Maciej J. Ciesielski

◀ ▶ joint publications with Daniel Gomez-Prado

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Publications

2013
[c49]
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Daniel Gomez-Prado, Maciej J. Ciesielski, Russell Tessier:
FPGA latency optimization using system-level transformations and DFG restructuring. DATE 2013: 1553-1558
2010
[c42]
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  - conf/hldvt/Gomez-PradoKCB10
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Daniel Gomez-Prado, Dusung Kim, Maciej J. Ciesielski, Emmanuel Boutillon:
Retiming arithmetic datapaths using Timed Taylor Expansion Diagrams. HLDVT 2010: 33-39
2009
[j19]
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  - journals/dt/CiesielskiGGB09
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Maciej J. Ciesielski, Jérémie Guillot, Daniel Gomez-Prado, Emmanuel Boutillon:
High-Level Dataflow Transformations Using Taylor Expansion Diagrams. IEEE Des. Test Comput. 26(4): 46-57 (2009)
[j18]
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  - journals/tcad/CiesielskiGRGB09
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Maciej J. Ciesielski, Daniel Gomez-Prado, Qian Ren, Jérémie Guillot, Emmanuel Boutillon:
Optimization of Data-Flow Computations Using Canonical TED Representation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(9): 1321-1333 (2009)
[c41]
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  - conf/date/Gomez-PradoRCGB09
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Daniel Gomez-Prado, Qian Ren, Maciej J. Ciesielski, Jérémie Guillot, Emmanuel Boutillon:
Optimizing data flow graphs to minimize hardware implementation. DATE 2009: 117-122
2007
[c37]
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  - conf/date/CiesielskiAGGB07
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Maciej J. Ciesielski, Serkan Askar, Daniel Gomez-Prado, Jérémie Guillot, Emmanuel Boutillon:
Data-flow transformations using Taylor expansion diagrams. DATE 2007: 455-460
2006
[c36]
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  - conf/date/GuillotBRCGA06
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Jérémie Guillot, Emmanuel Boutillon, Qian Ren, Maciej J. Ciesielski, Daniel Gomez-Prado, Serkan Askar:
Efficient factorization of DSP transforms using taylor expansion diagrams. DATE 2006: 754-755
2004
[c31]
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  - conf/hldvt/Gomez-PradoRACB04
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Daniel Gomez-Prado, Qian Ren, Serkan Askar, Maciej J. Ciesielski, Emmanuel Boutillon:
Variable ordering for taylor expansion diagrams. HLDVT 2004: 55-59

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