Koji Nii

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Miki Tanaka

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Publications

2018
[j32]
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Makoto Yabuuchi, Yasumasa Tsukamoto, Hidehiro Fujiwara, Miki Tanaka, Shinji Tanaka, Koji Nii:
A 28-nm 1R1W Two-Port 8T SRAM Macro With Screening Circuitry Against Read Disturbance and Wordline Coupling Noise Failures. IEEE Trans. Very Large Scale Integr. Syst. 26(11): 2335-2344 (2018)
2016
[c40]
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  - conf/vlsic/YabuuchiSSITTN16
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Makoto Yabuuchi, Yohei Sawada, Toshiaki Sano, Yuichiro Ishii, Shinji Tanaka, Miki Tanaka, Koji Nii:
A 6.05-Mb/mm² 16-nm FinFET double pumping 1W1R 2-port SRAM with 313 ps read access time. VLSI Circuits 2016: 1-2
2015
[c39]
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  - conf/asscc/YokoyamaIITTTN15
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Yoshisato Yokoyama, Yuichiro Ishii, Toshihiro Inada, Koji Tanaka, Miki Tanaka, Yoshiki Tsujihashi, Koji Nii:
A cost effective test screening method on 40-nm 4-Mb embedded SRAM for low-power MCU. A-SSCC 2015: 1-4
[c35]
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  - conf/vlsic/TsukamotoMYTN15
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Yasumasa Tsukamoto, Masao Morimoto, Makoto Yabuuchi, Miki Tanaka, Koji Nii:
1.8 Mbit/mm² ternary-CAM macro with 484 ps search access time in 16 nm Fin-FET bulk CMOS technology. VLSIC 2015: 274-
2014
[c28]
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  - conf/isscc/YabuuchiTMTN14
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Makoto Yabuuchi, Yasumasa Tsukamoto, Masao Morimoto, Miki Tanaka, Koji Nii:
13.3 20nm High-density single-port and dual-port SRAMs with wordline-voltage-adjustment system for read/write assists. ISSCC 2014: 234-235
2013
[c23]
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Makoto Yabuuchi, Hidehiro Fujiwara, Yasumasa Tsukamoto, Miki Tanaka, Shinji Tanaka, Koji Nii:
A 28nm high density 1R/1W 8T-SRAM macro with screening circuitry against read disturb failure. CICC 2013: 1-4

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