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ORCIDThomas Wild
- > Home > Persons > Thomas Wild
Publications
- 2011
[p2]Andreas Herkersdorf, Andreas Lankes, Michael Meitinger, Rainer Ohlendorf, Stefan Wallentowitz, Thomas Wild, Johannes Zeppenfeld:
Hardware Support for Efficient Resource Utilization in Manycore Processor Systems. Multiprocessor System-on-Chip 2011: 57-87- 2010
- [c21]Rainer Ohlendorf, Michael Meitinger, Thomas Wild, Andreas Herkersdorf:
An Application-Aware Load Balancing Strategy for Network Processors. HiPEAC 2010: 156-170 - [p1]Rainer Ohlendorf, Michael Meitinger, Thomas Wild, Andreas Herkersdorf:
FlexPath NP - Flexible, Dynamically Reconfigurable Processing Paths in Network Processors. Dynamically Reconfigurable Systems 2010: 355-374 - 2008
- [j4]Rainer Ohlendorf, Michael Meitinger, Thomas Wild, Andreas Herkersdorf:
A Processing Path Dispatcher in Network Processor MPSoCs. IEEE Trans. Very Large Scale Integr. Syst. 16(10): 1335-1345 (2008) - [c17]Michael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf:
A Hardware Packet Re-Sequencer Unit for Network Processors. ARCS 2008: 85-97 - [c15]Thilo Pionteck
, Roman Koch, Carsten Albrecht, Erik Maehle, Michael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf:
Network processors. FPL 2008: 352 - [c14]Michael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf:
FlexPath NP - A network processor architecture with flexible processing paths. SoC 2008: 1-6 - 2007
- [j3]Rainer Ohlendorf, Thomas Wild, Michael Meitinger, Holm Rauchfuss, Andreas Herkersdorf:
Simulated and measured performance evaluation of RISC-based SoC platforms in network processing applications. J. Syst. Archit. 53(10): 703-718 (2007) - [c10]Michael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf:
A Programmable Stream Processing Engine for Packet Manipulation in Network Processors. ISVLSI 2007: 259-264 - 2006
- [c8]Rainer Ohlendorf, Thomas Wild, Michael Meitinger, Holm Rauchfuss, Andreas Herkersdorf:
Performance Evaluation of RISC-based SoC Platforms in Network Processing Applications. ICSAMOS 2006: 152-159 - [i1]Andreas Herkersdorf, Christopher Claus, Michael Meitinger, Rainer Ohlendorf, Thomas Wild:
Reconfigurable Processing Units vs. Reconfigurable Interconnects. Dynamically Reconfigurable Architectures 2006
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