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2010 – 2019
- 2011
[c10]Cristinel Ababei, Hamed Sajjadi Kia, Om Prakash Yadav, Jingcao Hu:
Energy and reliability oriented mapping for regular Networks-on-Chip. NOCS 2011: 121-128
2000 – 2009
- 2006
- [j2]Jingcao Hu, Ümit Y. Ogras
, Radu Marculescu:
System-Level Buffer Allocation for Application-Specific Networks-on-Chip Router Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(12): 2919-2933 (2006) - 2005
- [j1]Jingcao Hu, Radu Marculescu:
Energy- and performance-aware mapping for regular NoC architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(4): 551-562 (2005) - [c9]Ümit Y. Ogras, Jingcao Hu, Radu Marculescu:
Communication-Centric SoC Design for Nanoscale Domain. ASAP 2005: 73-78 - [c8]Ümit Y. Ogras, Jingcao Hu, Radu Marculescu:
Key research problems in NoC design: a holistic perspective. CODES+ISSS 2005: 69-74 - 2004
- [c7]Jingcao Hu, Radu Marculescu:
DyAD: smart routing for networks-on-chip. DAC 2004: 260-263 - [c6]Jingcao Hu, Radu Marculescu:
Energy-Aware Communication and Task Scheduling for Network-on-Chip Architectures under Real-Time Constraints. DATE 2004: 234-239 - [c5]Jingcao Hu, Radu Marculescu:
Application-specific buffer space allocation for networks-on-chip router design. ICCAD 2004: 354-361 - [c4]Jingcao Hu, Youngsoo Shin, Nagu R. Dhanwada, Radu Marculescu:
Architecting voltage islands in core-based system-on-a-chip designs. ISLPED 2004: 180-185 - 2003
- [c3]Jingcao Hu, Radu Marculescu:
Energy-aware mapping for tile-based NoC architectures under performance constraints. ASP-DAC 2003: 233-239 - [c2]Jingcao Hu, Radu Marculescu:
Exploiting the Routing Flexibility for Energy/Performance Aware Mapping of Regular NoC Architectures. DATE 2003: 10688-10693 - 2002
- [c1]Jingcao Hu, Yangdong Deng, Radu Marculescu:
System-Level Point-to-Point Communication Synthesis using Floorplanning Information. ASP-DAC/VLSI Design 2002: 573-579
Coauthor Index
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