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ORCIDACM Transactions on Reconfigurable Technology and Systems, Volume 18
Volume 18, Number 1, March 2025
FCCM 2024 Journal Track
- Daniel Hutchings, Adam Taylor
, Jeffrey Goeders:
Toward FPGA Intellectual Property Encryption from Netlist to Bitstream. 1:1-1:27 - Chenfeng Zhao, Clayton J. Faber, Roger D. Chamberlain, Xuan Zhang:
HLPerf: Demystifying the Performance of HLS-based Graph Neural Networks with Dataflow Architectures. 2:1-2:26 - Mingqian Sun, Guangwei Xie, Fan Zhang, Wei Guo, Xitian Fan, Tianyang Li, Li Chen, Jiayu Du:
PTME: A Regular Expression Matching Engine Based on Speculation and Enumerative Computation on FPGA. 3:1-3:28 - Sajjad Tamimi, Arthur Bernhardt, Florian Stock, Ilia Petrov, Andreas Koch:
DANSEN: Database Acceleration on Native Computational Storage by Exploiting NDP. 4:1-4:33 - Hongzheng Chen, Jiahao Zhang, Yixiao Du, Shaojie Xiang, Zichao Yue, Niansong Zhang, Yaohui Cai, Zhiru Zhang:
Understanding the Potential of FPGA-based Spatial Acceleration for Large Language Model Inference. 5:1-5:29 - Ahmed F. AbouElhamayed, Angela Cui, Javier Fernández-Marqués, Nicholas D. Lane, Mohamed S. Abdelfattah:
PQA: Exploring the Potential of Product Quantization in DNN Hardware Acceleration. 6:1-6:29 - Shervin Vakili, Mobin Vaziri, Amirhossein Zarei, J. M. Pierre Langlois:
DyRecMul: Fast and Low-Cost Approximate Multiplier for FPGAs using Dynamic Reconfiguration. 7:1-7:22 - Ryota Miyagi, Ryota Yasudo, Kentaro Sano, Hideki Takase:
A Scalable Accelerator for Local Score Computation of Structure Learning in Bayesian Networks. 8:1-8:29 - Giovanni Gozzi, Michele Fiorito, Serena Curzel, Claudio Barone, Vito Giovanni Castellana, Marco Minutoli, Antonino Tumeo, Fabrizio Ferrandi:
SPARTA: High-Level Synthesis of Parallel Multi-Threaded Accelerators. 9:1-9:30 - Matthias Nickel, Diana Göhringer:
A Survey on Architectures, Hardware Acceleration and Challenges for In-Network Computing. 10:1-10:34
Original Articles
- Aggelos Ferikoglou, Andreas Kosmas Kakolyris, Dimosthenis Masouros, Dimitrios Soudris, Sotirios Xydis:
CollectiveHLS: A Collaborative Approach to High-Level Synthesis Design Optimization. 11:1-11:32 - Nicolai Fiege, Peter Zipf:
Fantastic Circuits and Where to Find Them - A Holistic ILP Formulation for Model-Based Hardware Design. 12:1-12:36 - Jordan Leggett, John McGlone, Süleyman Sirri Demirsoy, Christian Faerber, Vadim Pelyushenko:
Accelerating In-memory Database Functionality with FPGAs. 13:1-13:23 - Jiajun Wu, Mo Song, Jingmin Zhao, Yizhao Gao, Jia Li, Hayden Kwok-Hay So:
TATAA: Programmable Mixed-Precision Transformer Acceleration with a Transformable Arithmetic Architecture. 14:1-14:31 - Juan Encinas, Alfonso Rodríguez, Andrés Otero:
Leveraging Incremental Machine Learning for Reconfigurable Systems Modeling under Dynamic Workloads. 15:1-15:27
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