![](https://dblp1.uni-trier.de/img/logo.ua.320x120.png)
![](https://dblp1.uni-trier.de/img/dropdown.dark.16x16.png)
![](https://dblp1.uni-trier.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp1.uni-trier.de/img/search.dark.16x16.png)
![search dblp](https://dblp1.uni-trier.de/img/search.dark.16x16.png)
default search action
VLSI-SoC 2017: Abu Dhabi, United Arab Emirates - Selected Papers
- Michail Maniatakos, Ibrahim Abe M. Elfadel, Matteo Sonza Reorda, H. Fatih Ugurdag, José Monteiro, Ricardo Reis:
VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things - 25th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Abu Dhabi, United Arab Emirates, October 23-25, 2017, Revised and Extended Selected Papers. IFIP Advances in Information and Communication Technology 500, Springer 2019, ISBN 978-3-030-15662-6 - Kimiyoshi Usami, Shunsuke Kogure, Yusuke Yoshida, Ryo Magasaki, Hideharu Amano:
Level-Shifter-Less Approach for Multi-VDD SoC Design to Employ Body Bias Control in FD-SOI. 1-21 - Thiago Santos Copetti, Guilherme Cardoso Medeiros, Letícia Maria Bolzani Poehls, Tiago R. Balen:
Evaluating the Impact of Resistive Defects on FinFET-Based SRAMs. 22-45 - Sukarn Agarwal
, Hemangee K. Kapoor:
Lifetime Enhancement of Non-Volatile Caches by Exploiting Dynamic Associativity Management Techniques. 46-71 - Wala Saadeh
, Muhammad Awais Bin Altaf:
A Wearable Neuro-Degenerative Diseases Classification System Using Human Gait Dynamics. 72-91 - Vivek Nautiyal, Lalit Gupta, Gaurav Singla, Jitendra Dasani, Sagar Dwivedi, Martin Kinkade:
Self-timed Power-on Reset Circuit for Pseudo Dual/Two Port SRAM Used in Low-Voltage IoT Applications. 92-111 - Shahzad Muzaffar, Ibrahim Abe M. Elfadel
:
Pulsed Decimal Encoding for IoT Single-Channel Dynamic Signaling. 112-132 - Matthias Thiele, Steve Bigalke, Jens Lienig:
Electromigration Analysis of VLSI Circuits Using the Finite Element Method. 133-152 - Roberto Giorgio Rizzo, Valentino Peluso
, Andrea Calimera
, Jun Zhou:
On the Efficiency of Early Bird Sampling (EBS) an Error Detection-Correction Scheme for Data-Driven Voltage Over-Scaling. 153-177 - Stefano Aldegheri, Nicola Bombieri:
Integrating Simulink, OpenVX, and ROS for Model-Based Design of Embedded Vision Applications. 178-197 - Daniele Cesarini
, Andrea Bartolini
, Luca Benini
:
Modeling and Evaluation of Application-Aware Dynamic Thermal Control in HPC Nodes. 198-219 - Markus Stefan Wamser, Georg Sigl:
Pushing the Limits Further: Sub-Atomic AES. 220-239 - Ricardo Reis, Manfred Glesner:
VLSI-SoC: An Enduring Tradition. 240-255
![](https://dblp1.uni-trier.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.