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ORCIDFPT 2005: Singagore
- Gordon J. Brebner, Samarjit Chakraborty, Weng-Fai Wong:
Proceedings of the 2005 IEEE International Conference on Field-Programmable Technology, FPT 2005, 11-14 December 2005, Singapore. IEEE 2005, ISBN 0-7803-9407-0
Arithmetic
- Marcio Juliato, Guido Araujo, Julio César López-Hernández, Ricardo Dahab:
A custom instruction approach for hardware and software implementations of finite field arithmetic over F263 using Gaussian normal bases. FPT 2005: 5-12 - Ciaran McIvor, Máire McLoone, John V. McCanny:
High-Radix Systolic Modular Multiplication on Reconfigurable Hardware. FPT 2005: 13-18 - Karl Papadantonakis, Nachiket Kapre, Stephanie Chan, André DeHon:
Pipelining Saturated Accumulation. FPT 2005: 19-26 - Jérémie Detrey, Florent de Dinechin:
A Parameterized Floating-Point Exponential Function for FPGAs. FPT 2005: 27-34
Reconfiguration Mechanisms
- Christophe Bobda, Mateusz Majer, Ali Ahmadinia, Thomas Haller, André Linarth, Jürgen Teich:
The Erlangen Slot Machine: Increasing Flexibility in FPGA-Based Reconfigurable Platforms. FPT 2005: 37-42 - Markus Koester, Mario Porrmann, Heiko Kalte:
Task Placement for Heterogeneous Reconfigurable Architectures. FPT 2005: 43-50 - Xiaofang Wang, Sotirios G. Ziavras:
A Framework for Dynamic Resource Assignment and Scheduling on Reconfigurable Mixed-Mode On-Chip Multiprocessors. FPT 2005: 51-58
Custom Computing
- David B. Thomas, Wayne Luk:
High Quality Uniform Random Number Generation Through LUT Optimised Linear Recurrences. FPT 2005: 61-68 - Shin'ichi Wakabayashi, Kenji Kikuchi:
Solving the Minimum Dominating Set Problem with Instance-Specific Hardware on FPGAs. FPT 2005: 69-76 - M. P. T. Juvonen, José Gabriel F. Coutinho, J. L. Wang, Benny Lo, Wayne Luk, Oskar Mencer, Guang-Zhong Yang:
Custom Hardware Architectures for Posture Analysis. FPT 2005: 77-84
FPGA Applications
- Almudena Lindoso, Luis Entrena, Celia López-Ongil, Judith Liu-Jimenez:
Correlation-Based Fingerprint Matching Using FPGAs. FPT 2005: 87-94 - Kofi Appiah, Andrew Hunter:
A Single-Chip FPGA Implementation of Real-Time Adaptive Background Model. FPT 2005: 95-102 - Erdem Motuk, Roger F. Woods, Stefan Bilbao:
FPGA-Based Hardware for Physical Modelling Sound Synthesis by Finite Difference Schemes. FPT 2005: 103-110 - Ben Cope, Peter Y. K. Cheung, Wayne Luk, Sarah Witt:
Have GPUs Made FPGAs Redundant in the Field of Video Processing? FPT 2005: 111-118
Configurable Architectures
- Jeffrey M. Arnold:
S5: The Architecture and Development Flow of a Software Configurable Processor. FPT 2005: 121-128 - Vasutan Tunbunheng, Masayasu Suzuki, Hideharu Amano:
RoMultiC: Fast and Simple Configuration Data Multicasting Scheme for Coarse Grain Reconfigurable Devices. FPT 2005: 129-136 - Shanghua Gao, Kenshu Seto, Satoshi Komatsu, Masahiro Fujita:
Pipeline Scheduling for Array Based Reconfigurable Architectures Considering Interconnect Delays. FPT 2005: 137-144
Security
- Máire McLoone, Ciaran McIvor, Aidan Savage:
High-Speed Hardware Architectures of the Whirlpool Hash Function. FPT 2005: 147-162 - Amir Sheikh Zeineddini, Kris Gaj:
Secure Partial Reconfiguration of FPGAs. FPT 2005: 155-162 - Yohei Hasegawa, Shohei Abe, Hiroki Matsutani, Hideharu Amano, Kenichiro Anjo, Toru Awashima:
An Adaptive Cryptographic Accelerator for IPsec on Dynamically Reconfigurable Processor. FPT 2005: 163-170
Physical Technology
- Gary Chun Tak Chow, L. S. M. Tsui, Philip Heng Wai Leong, Wayne Luk, Steven J. E. Wilton:
Dynamic Voltage Scaling for Commercial FPGAs. FPT 2005: 173-180 - Rajarshee P. Bharadwaj, Rajan Konar, Dinesh Bhatia, Poras T. Balsara:
FPGA Architecture for Standby Power Management. FPT 2005: 181-188 - Anthony J. Yu, Guy G. Lemieux:
FPGA Defect Tolerance: Impact of Granularity. FPT 2005: 189-196
Reconfigurable Applications
- Irwin Kennedy:
A Dynamically Reconfigured UMTS Multi-Channel Complex Code Matched Filter. FPT 2005: 199-206 - Esam El-Araby, Mohamed Taher, Tarek A. El-Ghazawi, Jacqueline Le Moigne:
Prototyping Automatic Cloud Cover Assessment (ACCA) Algorithm for Remote Sensing On-Board Processing on a Reconfigurable Computer. FPT 2005: 207-214 - Guanglie Zhang, Philip Heng Wai Leong, Chun Hok Ho, Kuen Hung Tsoi, Chris C. C. Cheung, Dong-U Lee, Ray C. C. Cheung, Wayne Luk:
Reconfigurable Acceleration for Monte Carlo Based Financial Simulation. FPT 2005: 215-222
Tools
- Akshay Sharma, Scott Hauck:
Accelerating FPGA Routing Using Architecture-Adaptive A* Techniques. FPT 2005: 225-232 - Nastaran Baradaran, Pedro C. Diniz:
Compiler-Directed Design Space Exploration for Caching and Prefetching Data in High-Level Synthesis. FPT 2005: 233-240 - Bradley R. Quinton, Steven J. E. Wilton:
Post-Silicon Debug Using Programmable Logic Cores. FPT 2005: 241-248
Biological Modelling
- Oswaldo Cadenas, Graham M. Megson, Daniel Jones:
FPGA Organization for the Fast Path-Based Neural Branch Predictor. FPT 2005: 251-258 - César Torres-Huitzil, Bernard Girau:
FPGA Implementation of an Excitatory and Inhibitory Connectionist Model for Motion Perception. FPT 2005: 259-266 - Yoshiki Yamaguchi, Tsutomu Maruyama, Ryuzo Azuma, Akihiko Konagaya:
Spatiotemporal Simulation of a Single Living Cell. FPT 2005: 267-274
Poster Session 1
- Yi Lu, Neil W. Bergmann:
Dynamic Loading of Peripherals on Reconfigurable System-on-Chip. FPT 2005: 279-280 - Timothy F. Oliver, Douglas L. Maskell:
An FPGA Model for Developing Dynamic Circuit Computing. FPT 2005: 281-282 - Andrew Bainbridge-Smith, Su-Hyun Park:
ADH: An Aspect Described Hardware Programming Language. FPT 2005: 283-284 - Wolfgang Klingauf, Robert Günzel:
From TLM to FPGA: Rapid Prototyping with SystemC and Transaction Level Modeling. FPT 2005: 285-286 - Mototsugu Miyano, Minoru Watanabe, Fuminori Kobayashi:
Rapid Reconfiguration of an Optically Differential Reconfigurable Gate Array with Pulse Lasers. FPT 2005: 287-288 - Iván González, Francisco J. Gomez-Arribas, Sergio López-Buedo:
Hardware-Accelerated SSH on Self-Reconfigurable Systems. FPT 2005: 289-290 - Arvind Sudarsanam, Aravind Dasu:
A Fast and Efficient FPGA-Based Implementation for Solving a System of Linear Interval Equations. FPT 2005: 291-292 - Sebastian Lange, Martin Middendorf:
Heuristics for Context-Caches in 2-Level Reconfigurable Architectures. FPT 2005: 293-294 - John Harkins, Tarek A. El-Ghazawi, Esam El-Araby, Miaoqing Huang:
Performance of Sorting Algorithms on the SRC 6 Reconfigurable Computer. FPT 2005: 295-296 - Minoru Watanabe, Fuminori Kobayashi:
A Zero-Overhead Dynamic Optically Reconfigurable Gate Array. FPT 2005: 297-298
Poster Session 2
- Joshua Fender, Jonathan Rose, David R. Galloway:
The Transmogrifier-4: An FPGA-Based Hardware Development System with Multi-Gigabyte Memory Capacity and High Host and Memory Bandwidth. FPT 2005: 301-302 - Alberto Dassatti, Guido Masera, Mario Nicola, Andrea Concil, Angelo Poloni:
High Performance Channel Model Hardware Emulator for 802.11n. FPT 2005: 303-304 - Feng Lin, Haili Wang, Jinian Bian:
HW/SW Interface Synthesis Based on Avalon Bus Specification for Nios-Oriented SoC Design. FPT 2005: 305-306 - Ali Valizadeh, Morteza Saheb Zamani, Babak Sadeghian, Farhad Mehdipour:
A Reconfigurable Architecture for Implementing Multiple Cipher Algorithms. FPT 2005: 307-308 - Chang Shu, Kris Gaj, Tarek A. El-Ghazawi:
Low Latency Elliptic Curve Cryptography Accelerators for NIST Curves Over Binary Fields. FPT 2005: 309-310 - Esam El-Araby, Tarek A. El-Ghazawi, Kris Gaj:
A System-Level Design Methodology for Reconfigurable Computing Applications. FPT 2005: 311-312 - Mihail Petrov, Manfred Glesner:
Optimal FFT Architecture Selection for OFDM Receivers on FPGA. FPT 2005: 313-314 - Patrick Dickinson, Kofi Appiah, Andrew Hunter, Stephen Ormston:
An FPGA-Based Infant Monitoring System. FPT 2005: 315-316 - Andrew Kinane, Alan Casey, Valentin Muresan, Noel E. O'Connor:
FPGA-Based Conformance Testing and System Prototyping of an MPEG-4 SA-DCT Hardware Accelerator. FPT 2005: 317-318 - Scott Fischaber, R. Hasson, John McAllister, Roger F. Woods:
FPGA Core Network Implementation and Optimization: A Case Study. FPT 2005: 319-320
Poster Session 3
- Mihail Petrov, Manfred Glesner:
A State-Serial Viterbi Decoder Architecture for Digital Radio on FPGA. FPT 2005: 323-324 - Gerd Van den Branden, Abdellah Touhafi, Erik F. Dirkx:
A Design Methodology to Generate Dynamically Self-Reconfigurable SoCs for Virtex-II Pro FPGAs. FPT 2005: 325-326 - Ocean Y. H. Cheung, Philip Heng Wai Leong, Eric K. C. Tsang, Bertram Emil Shi:
Implementation of Gabor-Type Filters on Field Programmable Gate Arrays. FPT 2005: 327-328 - Panan Potipantong, Theerayod Wiangtong, Phaophak Sirisuk, Apisak Worapishet:
A Scaleable FFT/IFFT Kernel for Communication Systems Using Codesign Approach. FPT 2005: 329-330 - Laurence A. Hey, Peter Y. K. Cheung, Michael Gellman:
FPGA Based Router for Cognitive Packet Networks. FPT 2005: 331-332 - Andreas Fidjeland, Wayne Luk:
An Overview of High-Level Synthesis of Multiprocessors for Logic Programming. FPT 2005: 333-334 - Milind M. Parelkar, Kris Gaj:
Implementation of EAX Mode of Operation for FPGA Bitstream Encryption and Authentication. FPT 2005: 335-336 - Siobhán Launders, Wesley Cooper, Brian Foley:
Net Power Directed Clustering Algorithm for Low Net-Power Implementation of FPGAs. FPT 2005: 337-338 - Masato Yoshimi, Yasunori Osana, Yow Iwaoka, Akira Funahashi, Noriko Hiroi, Yuichiro Shibata, Naoki Iwanaga, Hiroaki Kitano, Hideharu Amano:
The Design of Scalable Stochastic Biochemical Simulator on FPGA. FPT 2005: 339-340 - Lesley Shannon, Blair Fort, Samir Parikh, Arun Patel, Manuel Saldaña, Paul Chow:
Designing an FPGA SoC Using a Standardized IP Block Interface. FPT 2005: 341-342
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