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ORCID26th FDL 2023: Turin, Italy
- Forum on Specification & Design Languages, FDL 2023, Turin, Italy, September 13-15, 2023. IEEE 2023, ISBN 979-8-3503-0737-5
- Daniele Jahier Pagliari
, Matteo Risso, Beatrice Alessandra Motetti, Alessio Burrello:
PLiNIO: A User-Friendly Library of Gradient-Based Methods for Complexity-Aware DNN Optimization. 1-8 - Christopher A. Metz, Christina Plump, Bernhard J. Berger, Rolf Drechsler:
Hybrid PTX Analysis for GPU accelerated CNN inferencing aiding Computer Architecture Design. 1-8 - Luigi Capogrosso, Alessio Mascolini, Federico Girella, Geri Skenderi, Sebastiano Gaiardelli, Nicola Dall'Ora, Francesco Ponzio, Enrico Fraccaroli, Santa Di Cataldo, Sara Vinco, Enrico Macii, Franco Fummi, Marco Cristani:
Neuro-Symbolic Empowered Denoising Diffusion Probabilistic Models for Real-Time Anomaly Detection in Industry 4.0: Wild-and-Crazy-Idea Paper. 1-4 - Markus Plattner, Chedi Fassi, Florian Kreiner, Jintin Frank, Philipp Radecker, Markus Zimmermann:
Satellite Payload Design for Optimized Thermal Management Using a Distributed Processor System. 1-7 - Jeremy Pope, Carl-Johan H. Seger:
Bifröst: Creating Hardware With Building Blocks. 1-8 - Jan Zielasko, Rolf Drechsler:
Virtual Prototype Driven Application Specific Hardware Optimization. 1-8 - Hokeun Kim:
Secure Programming Platform for Edge-Based IoT: Wild-and-Crazy-Idea Paper. 1-4 - Marcel Christian Werner, Klaus Schneider:
Formal Methods-Based Optimization of Dataflow Models with Translation to Synchronous Models. 1-8 - Alessandro Beghi, Nicola Dall'Ora, Davide Dalle Pezze, Franco Fummi, Chiara Masiero, Stefano Spellini, Gian Antonio Susto, Francesco Tosoni:
VIR2EM: VIrtualization and Remotization for Resilient and Efficient Manufacturing: Project-Dissemination Paper. 1-8 - Felix Böseler, Jörg Walter:
A Flexible Graph Language for a Model-Based Semi-Automatic CGRA Compilation Flow. 1-8 - Vivek Govindasamy, Rainer Dömer:
Instruction-Level Modeling and Evaluation of a Cache-Less Grid of Processing Cells. 1-8 - Milan Funck, Sallar Ahmadi-Pour, Vladimir Herdt, Rolf Drechsler:
Identification of ISA-Level Mutation-Classes for Qualification of RISC-V Formal Verification. 1-8 - Frans Skarman, Lucas Klemmer, Oscar Gustafsson, Daniel Große:
Enhancing Compiler-Driven HDL Design with Automatic Waveform Analysis. 1-8 - Sören Tempel, Tobias Brandt, Christoph Lüth, Rolf Drechsler:
Minimally Invasive Generation of RISC-V Instruction Set Simulators from Formal ISA Models. 1-8
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