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Publication search results
found 32 matches
- 2000
- Angelo Marcello Anile, Orazio Muscato, Vittorio Romano:
Moment Equations with Maximum Entropy Closure for Carrier Transport in Semiconductor Devices: Validation in Bulk Silicon. VLSI Design 10(4): 335-354 (2000) - Ted Bapty, Sandeep Neema, Jason Scott, Janos Sztipanovits, Sameh W. Asaad:
Model-integrated Tools for the Design of Dynamically Reconfigurable Systems. VLSI Design 10(3): 281-306 (2000) - W. Batty, A. J. Panks, R. G. Johnson, Christopher M. Snowden:
Electro-thermal Modelling of Monolithic and Hybrid Microwave and Millimeter Wave IC's. VLSI Design 10(4): 355-389 (2000) - Marco Aurélio de Figueiredo, Clay S. Gloster Jr., Mark A. Stephens, Corey A. Graves, Mouna Nakkar:
Implementation of Multispectral Image Classification on a Remote Adaptive Computer. VLSI Design 10(3): 307-319 (2000) - Carl L. Gardner:
Guest Editorial. VLSI Design 10(4) (2000) - Carl L. Gardner, Christian A. Ringhofer:
The Chapman-Enskog Expansion and the Quantum Hydrodynamic Model for Semiconductor Devices. VLSI Design 10(4): 415-435 (2000) - Warren J. Gross, Dragica Vasileska, David K. Ferry:
3D Simulations of Ultra-small MOSFETs with Real-space Treatment of the Electron - Electron and Electron-ion Interactions. VLSI Design 10(4): 437-452 (2000) - Jack Jean, Sanjaya Kumar:
Guest Editorial. VLSI Design 10(3) (2000) - Joseph W. Jerome:
Analytical and Computational Advances for Hydrodynamic Models of Classical and Quantum Charge Transport. VLSI Design 10(4): 453-466 (2000) - Zhen Luo, Margaret Martonosi, Pranav Ashar:
An Edge-endpoint-based Configurable Hardware Architecture for VLSI Layout Design Rule Checking. VLSI Design 10(3): 249-263 (2000) - Susanna Reggiani, Marina Valdinoci, Luigi Colalongo, Massimo Rudan, Giorgio Baccarani:
An Analytical, Temperature-dependent Model for Majority- and Minority-carrier Mobility in Silicon Devices. VLSI Design 10(4): 467-483 (2000) - Brian Schott, Stephen P. Crago, Robert Parker, Chen H. Chen, Lauretta C. Carter, Joseph Czarnaski, Matthew French, Ivan Hom, Tam Tho, Terri Valenti:
Reconfigurable Architectures for System Level Applications of Adaptive Computing. VLSI Design 10(3): 265-279 (2000) - Chi-Feng Wu, Cheng-Wen Wu:
Testing and Diagnosing Dynamic Reconfigurable FPGA. VLSI Design 10(3): 321-333 (2000) - Advanced Numerical Methods and Software Approaches for Semiconductor Device Simulation. VLSI Design 10(4): 391-414 (2000)
- Donald J. Rose, Hai Shao, Craig S. Henriquez:
Discretization of Anisotropic Convection-diffusion Equations, Convective M-matrices and their Iterative Solution. VLSI Design 10(4): 485-529 (2000) - 1999
- Charles J. Alpert, Andrew E. Caldwell, Tony F. Chan, Dennis J.-H. Huang, Andrew B. Kahng, Igor L. Markov, M. S. Moroz:
Analytical Engines are Unnecessary in Top-down Partitioning-based Placement. VLSI Design 10(1): 99-116 (1999) - Peter J. Ashenden, Philip A. Wilsey:
Principles for Language Extensions to VHDL to Support High-Level Modeling. VLSI Design 10(2): 217-235 (1999) - Edward Y. C. Cheng, Sartaj Sahni:
A Fast Algorithm for Performance-Driven Module Implementation Selection. VLSI Design 10(2): 237-247 (1999) - Jun-Dong Cho:
Preface. VLSI Design 10(1) (1999) - Malgorzata Chrzanowska-Jeske, Yang Xu, Marek A. Perkowski:
Logic Synthesis for a Regular Layout. VLSI Design 10(1): 35-55 (1999) - Lizy Kurian John:
Memory Chips with Adjustable Configurations. VLSI Design 10(2): 203-215 (1999) - Andrew B. Kahng, Sudhakar Muddu, Egino Sarto:
Tuning Strategies for Global Interconnects in High-Performance Deep-Submicron ICs. VLSI Design 10(1): 21-34 (1999) - Wonjong Kim, Hyunchul Shin:
Hierarchy Restructuring for Hierarchical LVS Comparison. VLSI Design 10(1): 117-125 (1999) - Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis:
Computation Reordering: A Novel Transformation for Low Power DSP Synthesis. VLSI Design 10(2): 177-202 (1999) - S.-H. Nam, J. D. Cho, D. Wagner:
Lower-Power and Min-Crosstalk Channel Routing for Deep-Submicron Layout Design. VLSI Design 10(1): 87-97 (1999) - Albrecht P. Stroele:
Signature Analysis for Test Responses of Sequential Circuits. VLSI Design 10(2): 127-141 (1999) - Dirk Stroobandt, Jan Van Campenhout:
Accurate Interconnection Length Estimations for Predictions Early in the Design Cycle. VLSI Design 10(1): 1-20 (1999) - Maogang Wang, Prithviraj Banerjee, Majid Sarrafzadeh:
Placement with Incomplete Data. VLSI Design 10(1): 57-70 (1999) - Wen-Jer Wu, Chuan Yi Tang:
Automatic Test Timing Assignment for RAMs Using Linear Programming. VLSI Design 10(2): 143-153 (1999) - Jin Xu, Pei-Ning Guo, Chung-Kuan Cheng:
Empirical Study of Block Placement by Cluster Refinement. VLSI Design 10(1): 71-86 (1999)
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