Остановите войну!
for scientists:
default search action
Search dblp
Full-text search
- > Home
Please enter a search query
- case-insensitive prefix search: default
e.g., sig matches "SIGIR" as well as "signal" - exact word search: append dollar sign ($) to word
e.g., graph$ matches "graph", but not "graphics" - boolean and: separate words by space
e.g., codd model - boolean or: connect words by pipe symbol (|)
e.g., graph|network
Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.
Author search results
no matches
Venue search results
no matches
Refine list
refine by author
- no options
- temporarily not available
refine by venue
- no options
- temporarily not available
refine by type
- no options
- temporarily not available
refine by access
- no options
- temporarily not available
refine by year
- no options
- temporarily not available
Publication search results
found 53 matches
- 2023
- Seema G. Aarella, Saraju P. Mohanty, Elias Kougianos, Deepak Puthal:
Fortified-Edge 2.0: Machine Learning based Monitoring and Authentication of PUF-Integrated Secure Edge Data Center. ISVLSI 2023: 1-6 - Geancarlo Abich, Anderson Ignacio da Silva, José Eduardo Thums, Rafael da Silva, Altamiro Amadeu Susin, Ricardo Reis, Luciano Ost:
Power, Performance and Reliability Evaluation of Multi-thread Machine Learning Inference Models Executing in Multicore Edge Devices. ISVLSI 2023: 1-6 - Tiago da Silva Almeida, Lucas Wanner:
Efficient Accelerator Design in High-Level Synthesis Using Approximate Logic Components. ISVLSI 2023: 1-6 - Gabriel Ammes, Paulo F. Butzen, André Inácio Reis, Renato P. Ribas:
Evaluation of Digital Circuit Design by Combining Two - and Multi-Level Approximate Logic Synthesis. ISVLSI 2023: 1-6 - Nidhi Anantharajaiah, Yunhe Xu, Fabian Lesniak, Tanja Harbaum, Jürgen Becker:
DREAM: Distributed Reinforcement Learning Enabled Adaptive Mixed-Critical NoC. ISVLSI 2023: 1-6 - Venkata K. V. V. Bathalapalli, Saraju P. Mohanty, Elias Kougianos, Vasanth Iyer, Bibhudutta Rout:
iTPM: Exploring PUF-based Keyless TPM for Security-by-Design of Smart Electronics. ISVLSI 2023: 1-6 - Sachin Bhat, Sourabh Kulkarni, Csaba Andras Moritz:
Compact Model Parameter Extraction using Bayesian Machine Learning. ISVLSI 2023: 1-6 - Giani Augusto Braga, Marcio M. Gonçalves, José Rodrigo Azambuja:
Evaluating an XOR-based Hybrid Fault Tolerance Technique to Detect Faults in GPU Pipelines. ISVLSI 2023: 1-6 - Leonardo Heitich Brendler, Hervé Lapuyade, Yann Deval, Ricardo Reis, François Rivet:
A MCU-robust Interleaved Data/Detection SRAM for Space Environments. ISVLSI 2023: 1-6 - Grant Brown, Ganesh Gore, Pierre-Emmanuel Gaillardon:
Performance Optimized Clock Tree Embedding for Auto-Generated FPGAs. ISVLSI 2023: 1-6 - Prashanth H. C., Prashanth Jonna, Madhav Rao:
CellFlow: Automated Standard Cell Design Flow. ISVLSI 2023: 1-5 - Raphael Cardoso, Clément Zrounba, Mohab Abdalla, Paul Jiménez, Mauricio Gomes de Queiroz, Benoît Charbonnier, Fabio Pavanello, Ian O'Connor, Sébastien Le Beux:
Photonic Convolution Engine Based on Phase-Change Materials and Stochastic Computing. ISVLSI 2023: 1-6 - Kamal Danouchi, Guillaume Prenat, Philippe Talatchian, Louis Hutin, Lorena Anghel:
Robustness and Power Efficiency in Spin-Orbit Torque-Based Probabilistic Logic Circuits. ISVLSI 2023: 1-6 - Joy Dutta, Deepak Puthal:
IoMT Synthetic Cardiac Arrest Dataset for eHealth with AI-based Validation. ISVLSI 2023: 1-6 - Ruan Evangelista Formigoni, Ricardo S. Ferreira, Omar P. Vilela Neto, José Augusto Miranda Nacif:
L-BANCS: A Multi-Phase Tile Design for Nanomagnetic Logic. ISVLSI 2023: 1-6 - Chunkai Fu, Ben Trombley, Hua Xiang, Gi-Joon Nam, Jiang Hu:
Machine Learning Techniques for Pre-CTS Identification of Timing Critical Flip-Flops. ISVLSI 2023: 1-6 - Harshita Gupta, Mayank Kabra, Asmita Zjigyasu, Madhav Rao:
FastNTT: Design and Evaluation of Modular-Reduction Based Fast NTT Design on FPGA. ISVLSI 2023: 1-6 - Changfu He, Keyue Deng, Suwen Song, Zhongfeng Wang:
Column-Weighted Probabilistic GDBF Decoder for Irregular LDPC Codes. ISVLSI 2023: 1-6 - Michael Guilherme Jordan, Guilherme Korol, Tiago Knorst, Mateus Beck Rutzig, Antonio Carlos Schneider Beck:
Resource Provisioning for CPU-FPGA Environments with Adaptive HLS-Versioning and DVFS. ISVLSI 2023: 1-6 - Indranee Kashyap, Dipika Deb, Nityananda Sarma:
Grep: Performance Enhancement in MultiCore Processors using an Adaptive Graph Prefetcher. ISVLSI 2023: 1-6 - Guilherme Korol, Michael Guilherme Jordan, Mateus Beck Rutzig, Jerónimo Castrillón, Antonio Carlos Schneider Beck:
Design Space Exploration for CNN Offloading to FPGAs at the Edge. ISVLSI 2023: 1-6 - Taixin Li, Hongtao Zhong, Sumitha George, Vijaykrishnan Narayanan, Liang Shi, Huazhong Yang, Xueqing Li:
Design Exploration of Dynamic Multi-Level Ternary Content-Addressable Memory Using Nanoelectromechanical Relays. ISVLSI 2023: 1-6 - Arthur Francisco Lorenzon, Guilherme Korol, Marcelo Brandalero, Antonio Carlos Schneider Beck:
Harnessing the Effects of Process Variability to Mitigate Aging in Cloud Servers. ISVLSI 2023: 1-6 - Anand Menon, Amisha Srivastava, Shamik Kundu, Kanad Basu:
Application Profiling Using Register-Instruction Hardware Performance Counters. ISVLSI 2023: 1-6 - Marcello M. Muñoz, Denis Maass, Murilo R. Perleberg, Luciano Agostini, Marcelo Schiavon Porto:
Efficient Hardware Design for the VVC Affine Motion Compensation Exploiting Multiple Constant Multiplication. ISVLSI 2023: 1-6 - Yerzhan Mustafa, Selçuk Köse:
Modeling and Analysis of Switched-Capacitor Converters as a Multi-port Network for Covert Communication. ISVLSI 2023: 1-6 - Sundarakumar Muthukumaran, Aparajithan Nathamuni Venkatesan, Kishore Pula, Ram Venkat Narayanan, Ranga Vemuri, John Marty Emmert:
Reverse Engineering of RTL Controllers from Look-Up Table Netlists. ISVLSI 2023: 1-6 - Alessandro Nadalini, Georg Rutishauser, Alessio Burrello, Nazareno Bruschi, Angelo Garofalo, Luca Benini, Francesco Conti, Davide Rossi:
A 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain Mixed-Precision Quantized Neural Networks. ISVLSI 2023: 1-6 - Sobhan Niknam, Yixian Shen, Anuj Pathania, Andy D. Pimentel:
3D-TTP: Efficient Transient Temperature-Aware Power Budgeting for 3D-Stacked Processor-Memory Systems. ISVLSI 2023: 1-6 - Priyanka Panigrahi, Chandan Karfa:
An Investigation into the Security of Register Allocation with Spilling and Splitting. ISVLSI 2023: 1-6
skipping 23 more matches
loading more results
failed to load more results, please try again later
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from , , and to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
retrieved on 2024-05-14 14:04 CEST from data curated by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint