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Publication search results
found 68 matches
- 2012
- Sudip Roy, Bhargab B. Bhattacharya, Sarmishtha Ghoshal, Krishnendu Chakrabarty:
Low-Cost Dilution Engine for Sample Preparation in Digital Microfluidic Biochips. ISED 2012: 203-207 - Atin Mukherjee, Anindya Sundar Dhar:
Design of a Self-Reconfigurable Adder for Fault-Tolerant VLSI Architecture. ISED 2012: 92-96 - Hemant Agrawal, Yashpal Dutta, Sandeep Malik:
Performance Analysis of Offloading IPsec Processing to Hardware Based Accelerators. ISED 2012: 291-294 - Sumeet Agrawal, Pinal Engineer, Rajbabu Velmurugan, Sachin B. Patkar:
FPGA Implementation of Particle Filter Based Object Tracking in Video. ISED 2012: 82-86 - Syed Ershad Ahmed, Sibi Abraham, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas:
A Modified Twin Precision Multiplier with 2D Bypassing Technique. ISED 2012: 102-106 - Naushad Alam, Bulusu Anand, Sudeb Dasgupta:
The Impact of Process-Induced Mechanical Stress in Narrow Width Devices and Circuit Design Issues. ISED 2012: 213-215 - Satarupa Bal, Anup Anurag, B. Chitti Babu:
An Improved Soft Switching DC-DC Converter for Low Power PV Applications. ISED 2012: 276-280 - Anwesha Banerjee, Shounak Datta, Pratyusha Das, Amit Konar, D. N. Tibarewala, Ramadoss Janarthanan:
Electrooculogram Based Online Control Signal Generation for Wheelchair. ISED 2012: 251-255 - Kunal Banerjee, Chandan Karfa, Dipankar Sarkar, Chittaranjan Mandal:
A Value Propagation Based Equivalence Checking Method for Verification of Code Motion Techniques. ISED 2012: 67-71 - Subhramita Basak, Dipankar Saha, Sagar Mukherjee, Sayan Chatterjee, Chandan Kumar Sarkar:
Design and Analysis of a Robust, High Speed, Energy Efficient 18 Transistor 1-bit Full Adder Cell, Modified with the Concept of MVT Scheme. ISED 2012: 130-134 - Soumyasree Bera, Arun Kumar Singh, Samarendra Nath Sur, Debasish Bhaskar, Rabindranath Bera:
Improvement in Target Detectability Using Spread Spectrum Radar in Dispersive Channel Condition. ISED 2012: 264-266 - Deepak Bharti, Abhijit R. Asati:
Design of a Static Current Simulator Using Device Matrix Approach. ISED 2012: 193-197 - Sukanta Bhattacharjee, Ansuman Banerjee, Bhargab B. Bhattacharya:
Multiple Dilution Sample Preparation Using Digital Microfluidic Biochips. ISED 2012: 188-192 - Deepak Chauhan, Sharad Kumar, Manoj Sharma:
Post Silicon Validation of Digital Radio Interfaces. ISED 2012: 87-91 - Kwen-Siong Chong, Joseph S. Chang, Idongesit E. Ebong, Yalcin Yilmaz, Pinaki Mazumder:
Comparison of FFT/IFFT Designs Utilizing Different Low Power Techniques. ISED 2012: 116-119 - Mamata Dalui, Biplab K. Sikdar:
A Test Design for Quick Determination of Incoherency in Chip Multiprocessors' Cache Realizing MOESI Protocol. ISED 2012: 216-220 - Debaprasad Das, Sourav Das, Hafizur Rahaman:
Design of 4-Bit Array Multiplier Using Multi-wall Carbon Nanotube Interconnects. ISED 2012: 208-212 - Kamalika Datta, Indranil Sengupta, Hafizur Rahaman:
Particle Swarm Optimization Based Circuit Synthesis of Reversible Logic. ISED 2012: 226-230 - Anirban De, Santwana Kumari, V. K. Khare, S. S. Pal, Anindya Sadhukhan, V. K. Meshram, S. K. Thakur, Subimal Saha:
Design, Development and Testing of a DSP Based Dynamic Voltage Restorer. ISED 2012: 157-161 - Rolf Drechsler, Robert Wille:
Synthesis of Reversible Circuits Using Decision Diagrams. ISED 2012: 1-5 - Gerhard W. Dueck:
Synthesis of Toffoli Networks: Status and Challenges. ISED 2012: 11-16 - Rohith G., Ajayan K. K.:
Fractional Interpretation of Anomalous Diffusion and Semiconductor Equations. ISED 2012: 231-235 - Jamil Galadanci, Rishad A. Shafik, Jimson Mathew, Amit Acharyya, Dhiraj K. Pradhan:
A Closed-Loop Control Strategy for Glucose Control in Artificial Pancreas Systems. ISED 2012: 295-299 - Prasun Ghosal, Tuhin Subhra Das:
SD2D: A Novel Routing Architecture for Network-on-Chip. ISED 2012: 221-225 - Sandip Ghosh, Prokash Ghosh, Sourav Roy:
Dynamic Sharing of On-Chip Scratchpad Memory on Embedded Platforms. ISED 2012: 120-124 - Deep Gupta, R. S. Anand, Barjeev Tyagi:
Enhancement of Medical Ultrasound Images Using Multiscale Discrete Shearlet Transform Based Thresholding. ISED 2012: 286-290 - Ashish Gupta, Gaurav Verma:
Bridging Validation and Automatic Test Equipment (ATE) Environment. ISED 2012: 148-150 - Vasantha M. H., Tonse Laxminidhi:
0.5 V, Low Power, 1 MHz Low Pass Filter in 0.18 µm CMOS Process. ISED 2012: 33-37 - Raju Hazari, Kamalika Bhattacharjee, Sukanta Das:
Design of Hardware for Deterministic Nagel-Schreckenberg Traffic Model. ISED 2012: 154-156 - Xingxing Jin, Seok-Bum Ko:
GPU-based Parallel Implementation of SAR Imaging. ISED 2012: 125-129
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