• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 43 matches

• 2005
• 
  Syed Saif Abrar:
  Novel source-independent characterization methodology for embedded software energy estimation and optimization. J. Syst. Archit. 51(6-7): 395-404 (2005)
• 
  Ahmed Yassin Al-Dubai, Mohamed Ould-Khaoua, Lewis M. Mackenzie:
  A plane-based broadcast algorithm for multicomputer networks. J. Syst. Archit. 51(10-11): 617-632 (2005)
• 
  Péter Arató, Zoltán Ádám Mann, András Orbán:
  Time-constrained scheduling of large pipelined datapaths. J. Syst. Archit. 51(12): 665-687 (2005)
• 
  Lucia Lo Bello, Alfio Antonio Gangemi:
  A slot swapping protocol for time-critical internetworking. J. Syst. Archit. 51(9): 526-541 (2005)
• 
  Kristof Beyls, Erik H. D'Hollander:
  Generating cache hints for improved program efficiency. J. Syst. Archit. 51(4): 223-250 (2005)
• 
  Arijit Bishnu, Bhargab B. Bhattacharya, Malay K. Kundu, C. A. Murthy, Tinku Acharya:
  A pipeline architecture for computing the Euler number of a binary image. J. Syst. Archit. 51(8): 470-487 (2005)
• 
  Montserrat Bóo, Margarita Amor:
  High-performance architecture for anisotropic filtering. J. Syst. Archit. 51(5): 297-314 (2005)
• 
  Yuh-Shyan Chen, Chih-Yung Chang, Tsung-Hung Lin, Chun-Bo Kuo:
  A generalized fault-tolerant sorting algorithm on a product network. J. Syst. Archit. 51(3): 185-205 (2005)
• 
  Tzung-Shi Chen, Nen-Chung Wang:
  Optimal broadcasting on incomplete star graph interconnection networks. J. Syst. Archit. 51(2): 143-150 (2005)
• 
  Sung Woo Chung, Hyong-Shik Kim, Chu Shik Jhon:
  Distance-aware L2 cache organizations for scalable multiprocessor systems. J. Syst. Archit. 51(6-7): 368-381 (2005)
• 
  Nabanita Das:
  More on rearrangeability of combined (2n. J. Syst. Archit. 51(3): 207-222 (2005)
• 
  Lieven Eeckhout, Smaïl Niar, Koen De Bosschere:
  Optimal sample length for efficient cache simulation. J. Syst. Archit. 51(9): 513-525 (2005)
• 
  Matjaz Finc, Andrej Zemva:
  Profiling soft-core processor applications for hardware/software partitioning. J. Syst. Archit. 51(5): 315-329 (2005)
• 
  Fotios Gioulekas, Michael K. Birbas, Nikos S. Voros, George Kouklaras, Alexios N. Birbas:
  Heterogeneous system level co-simulation for the design of telecommunication systems. J. Syst. Archit. 51(12): 688-705 (2005)
• 
  Lech Józwiak, Szymon Bieganski, Artur Chojnacki:
  Information-driven circuit synthesis with the pre-characterized gate libraries. J. Syst. Archit. 51(6-7): 405-423 (2005)
• 
  Ali Karci:
  Generalized parallel divide and conquer on 3D mesh and torus. J. Syst. Archit. 51(5): 281-295 (2005)
• 
  Parag A. Kulkarni, Indranil Sengupta:
  Dual and multiple token based approaches for load balancing. J. Syst. Archit. 51(2): 95-110 (2005)
• 
  Jeong-Gun Lee, Euiseok Kim, Dong-Ik Lee:
  Instruction level redundant number computations for fast data intensive processing in asynchronous processors. J. Syst. Archit. 51(3): 151-164 (2005)
• 
  Ben Lee, Eriko Nurvitadhi, Reshma Dixit, Chansu Yu, Myungchul Kim:
  Dynamic voltage scaling techniques for power efficient video decoding. J. Syst. Archit. 51(10-11): 633-652 (2005)
• 
  Jung-Hoon Lee, Gi-Ho Park, Shin-Dug Kim:
  A new NAND-type flash memory package with smart buffer system for spatial and temporal localities. J. Syst. Archit. 51(2): 111-123 (2005)
• 
  Guohui Li, Hongya Wang:
  A novel min-process checkpointing scheme for mobile computing systems. J. Syst. Archit. 51(1): 45-61 (2005)
• 
  Xiaofei Liao, Hai Jin:
  A new distributed storage scheme for cluster video server. J. Syst. Archit. 51(2): 79-94 (2005)
• 
  Claude Limousin, Julien Sébot, Alexis Vartanian, Nathalie Drach:
  Architecture optimization for multimedia application exploiting data and thread-level parallelism. J. Syst. Archit. 51(1): 15-27 (2005)
• 
  Ernesto Martins, Luís Almeida, José Alberto Fonseca:
  An FPGA-based coprocessor for real-time fieldbus traffic scheduling - architecture and implementation. J. Syst. Archit. 51(1): 29-44 (2005)
• 
  Venkatesan Muthukumar, Bharath Radhakrishnan, Henry Selvaraj:
  Multiple voltage and frequency scheduling for power minimization. J. Syst. Archit. 51(6-7): 382-394 (2005)
• 
  S. W. Ng, Edward Chan:
  Equation-based TCP-friendly congestion control under lossy environment. J. Syst. Archit. 51(9): 542-569 (2005)
• 
  Sejin Park, Sang-Hwa Chung, Ben Lee:
  Implementation and performance study of a hardware-VIA-based network adapter on Gigabit Ethernet. J. Syst. Archit. 51(10-11): 602-616 (2005)
• 
  Jun Ho Park, Myung-Jin Lee, Soon-Ju Kang:
  CORBA-based distributed and replicated resource repository architecture for hierarchically configurable home network. J. Syst. Archit. 51(2): 125-142 (2005)
• 
  Seetharaman Ramachandran, S. Srinivasan:
  Design and FPGA implementation of an MPEG based video scalar with reduced on-chip memory utilization. J. Syst. Archit. 51(6-7): 435-450 (2005)
• 
  Mariusz Rawski, Henry Selvaraj, Tadeusz Luba:
  An application of functional decomposition in ROM-based FSM implementation in FPGA devices. J. Syst. Archit. 51(6-7): 424-434 (2005)

skipping 13 more matches