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ORCIDErik H. D'Hollander
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- affiliation: Ghent University, Belgium
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2020 – today
- 2024
[c39]Erik H. D'Hollander, Ewout Danneels, Karel-Brecht Decorte, Senne Loobuyck, Arne Vanheule, Ian Van Kets, Dirk Stroobandt:
Exploring Large Language Models for Verilog Hardware Design Generation. IPDPS (Workshops) 2024: 111-115- 2023
- [c38]Gerbrand De Laender
, Erik H. D'Hollander:
ZyPy: Intercepting NumPy operations for acceleration on FPGAs. HEART 2023: 100-106
2010 – 2019
- 2019
- [j15]Thomas Faict, Erik H. D'Hollander, Bart Goossens:
Mapping a Guided Image Filter on the HARP Reconfigurable Architecture Using OpenCL. Algorithms 12(8): 149 (2019) - [c37]Erik H. D'Hollander:
Empowering Parallel Computing with Field Programmable Gate Arrays. PARCO 2019: 16-31 - 2018
- [c36]Bruno da Silva, Jan G. Cornelis, An Braeken, Erik H. D'Hollander, Jan Lemeire, Abdellah Touhafi:
Heterogeneous Cloud Computing: Design Methodology to Combine Hardware Accelerators. Cloudtech 2018: 1-8 - 2017
- [c35]Erik H. D'Hollander, Bruno Chevalier, Koen De Bosschere:
Calling hardware procedures in a reconfigurable accelerator using RPC-FPGA. FPT 2017: 271-274 - [c34]Erik H. D'Hollander, Abdellah Touhafi:
ParaFPGA 2017: Enlarging the Scope of Parallel Programming with FPGAs. PARCO 2017: 619-621 - 2016
- [j14]Erik H. D'Hollander:
High-Level Synthesis Optimization for Blocked Floating-Point Matrix Multiplication. SIGARCH Comput. Archit. News 44(4): 74-79 (2016) - 2015
- [c33]Erik H. D'Hollander, Dirk Stroobandt, Abdellah Touhafi:
ParaFPGA15: Exploring threads and trends in programmable hardware. PARCO 2015: 501-504 - 2013
- [j13]Bruno da Silva, An Braeken, Erik H. D'Hollander, Abdellah Touhafi:
Performance Modeling for FPGAs: Extending the Roofline Model with High-Level Synthesis Tools. Int. J. Reconfigurable Comput. 2013: 428078:1-428078:10 (2013) - [c32]Bruno da Silva, An Braeken, Erik H. D'Hollander, Abdellah Touhafi, Jan G. Cornelis, Jan Lemeire:
Performance and toolchain of a combined GPU/FPGA desktop (abstract only). FPGA 2013: 274 - [c31]Bruno da Silva, An Braeken, Erik H. D'Hollander, Abdellah Touhafi, Jan G. Cornelis, Jan Lemeire:
Comparing and combining GPU and FPGA accelerators in an image processing context. FPL 2013: 1-4 - [c30]Erik H. D'Hollander, Dirk Stroobandt, Abdellah Touhafi:
ParaFPGA 2013: Harnessing Programs, Power and Performance in Parallel FPGA applications. PARCO 2013: 493-496 - [c29]Bruno da Silva, An Braeken, Erik H. D'Hollander, Abdellah Touhafi:
Performance and Resource Modeling for FPGAs using High-Level Synthesis tools. PARCO 2013: 523-531 - [e5]Erik H. D'Hollander, Jack J. Dongarra, Ian T. Foster, Lucio Grandinetti, Gerhard R. Joubert:
Transition of HPC Towards Exascale Computing - Selected Papers from the High Performance Computing Workshop, Cetraro, Italy, June 25-29, 2012. Advances in Parallel Computing 24, IOS Press 2013, ISBN 978-1-61499-323-0 [contents] - 2012
- [c28]Bruno da Silva, An Braeken, Erik H. D'Hollander, Abdellah Touhafi, Jan G. Cornelis, Jan Lemeire:
Performance and Programming Environment of a Combined GPU/FPGA Desktop. High Performance Computing Workshop (2) 2012: 177-193 - [e4]Koen De Bosschere, Erik H. D'Hollander, Gerhard R. Joubert, David A. Padua, Frans J. Peters, Mark Sawyer:
Applications, Tools and Techniques on the Road to Exascale Computing, Proceedings of the conference ParCo 2011, 31 August - 3 September 2011, Ghent, Belgium. Advances in Parallel Computing 22, IOS Press 2012, ISBN 978-1-61499-040-6 [contents] - 2011
- [c27]Erik H. D'Hollander, Dirk Stroobandt, Abdellah Touhafi:
ParaFPGA 2011 - High Performance Computing with Multiple FPGAs: Design Methodology and Applications. PARCO 2011: 575-577
2000 – 2009
- 2009
- [j12]Kristof Beyls, Erik H. D'Hollander:
Refactoring for Data Locality. Computer 42(2): 62-71 (2009) - [j11]Peter Bertels, Wim Heirman, Erik H. D'Hollander, Dirk Stroobandt:
Efficient memory management for hardware accelerated Java Virtual Machines. ACM Trans. Design Autom. Electr. Syst. 14(4): 48:1-48:18 (2009) - [c26]Erik H. D'Hollander, Dirk Stroobandt, Abdellah Touhafi:
ParaFPGA: Parallel Computing with Flexible Hardware. PARCO 2009: 581-583 - 2008
- [j10]Kristof Beyls, Erik H. D'Hollander:
Refactoring Intermediately Executed Code to Reduce Cache Capacity Misses. J. Instr. Level Parallelism 10 (2008) - [c25]Fabian Diet, Erik H. D'Hollander, Kristof Beyls, Harald Devos:
Embedding Smart Buffers for Window Operations in a Stream-Oriented C-to-VHDL Compiler. DELTA 2008: 142-147 - [c24]Erik H. D'Hollander, Kristof Beyls:
High Performance Computing with FPGAs. High Performance Computing Workshop 2008: 55-73 - 2007
- [j9]Harald Devos, Kristof Beyls, Mark Christiaens, Jan M. Van Campenhout, Erik H. D'Hollander, Dirk Stroobandt:
Finding and Applying Loop Transformations for Generating Optimized FPGA Implementations. Trans. High Perform. Embed. Archit. Compil. 1: 159-178 (2007) - [c23]Erik H. D'Hollander, Dirk Stroobandt, Abdellah Touhafi:
Parallel Computing with FPGAs - Concepts and Applications. PARCO 2007: 739-740 - 2006
- [c22]Kristof Beyls, Erik H. D'Hollander:
Intermediately executed code is the key to find refactorings that improve temporal data locality. Conf. Computing Frontiers 2006: 373-382 - [c21]Kristof Beyls, Erik H. D'Hollander:
Discovery of Locality-Improving Refactorings by Reuse Path Analysis. HPCC 2006: 220-229 - 2005
- [j8]Kristof Beyls, Erik H. D'Hollander:
Generating cache hints for improved program efficiency. J. Syst. Archit. 51(4): 223-250 (2005) - [j7]Yijun Yu, Jianguo Lu, John Mylopoulos, Weiwei Sun, Jing-Hao Xue, Erik H. D'Hollander:
Making XML document markup international. Softw. Pract. Exp. 35(1): 1-14 (2005) - [c20]Kristof Beyls, Erik H. D'Hollander, Frederik Vandeputte:
RDVIS: A Tool that Visualizes the Causes of Low Locality and Hints Program Optimizations. International Conference on Computational Science (2) 2005: 166-173 - 2004
- [j6]Fubo Zhang, Erik H. D'Hollander:
Using Hammock Graphs to Structure Programs. IEEE Trans. Software Eng. 30(4): 231-245 (2004) - [c19]Kristof Beyls, Erik H. D'Hollander:
Platform-Independent Cache Optimization by Pinpointing Low-Locality Reuse. International Conference on Computational Science 2004: 448-455 - [c18]Yijun Yu, Erik H. D'Hollander:
Non-Uniform Dependences Partitioned by Recurrence Chains. ICPP 2004: 100-107 - [c17]Yijun Yu, Kristof Beyls, Erik H. D'Hollander:
Performance Visualizations using XML Representations. IV 2004: 795-800 - 2002
- [c16]Kristof Beyls, Erik H. D'Hollander:
Reuse Distance-Based Cache Hint Selection. Euro-Par 2002: 265-274 - [c15]Kristof Beyls, Erik H. D'Hollander, Yijun Yu:
Visualization Enables the Programmer to Reduce Cache Misses. IASTED PDCS 2002: 774-781 - 2001
- [j5]Henk J. Sips, Ruud Sommerhalder, Erik H. D'Hollander:
Linear systems and associated problems - introduction. Parallel Comput. 27(7): 867-868 (2001) - [j4]Yijun Yu, Erik H. D'Hollander:
Loop Parallelization using the 3D Iteration Space Visualizer. J. Vis. Lang. Comput. 12(2): 163-181 (2001) - [c14]Yijun Yu, Kristof Beyls, Erik H. D'Hollander:
Visualizing the Impact of the Cache on Program Execution. IV 2001: 336-341 - 2000
- [j3]Kristof Beyls, Erik H. D'Hollander:
Compiler Generated Multithreading to Alleviate Memory Latency. J. Univers. Comput. Sci. 6(10): 968-993 (2000) - [c13]Kristof Beyls, Erik H. D'Hollander:
Cache Remapping to Improve the Performance of Tiled Algorithms. Euro-Par 2000: 998-1007 - [c12]Yijun Yu, Erik H. D'Hollander:
Partitioning Loops with Variable Dependence Distances. ICPP 2000: 209-218
1990 – 1999
- 1999
- [c11]Kristof Beyls, Erik H. D'Hollander, Yijun Yu:
JPT: A Java Parallelization Tool. PVM/MPI 1999: 173-180 - [e3]Erik H. D'Hollander, Gerhard R. Joubert, Frans J. Peters, Henk J. Sips:
Parallel Computing: Fundamentals & Applications, Proceedings of the Conference ParCo'99, 17-20 August 1999, Delft, The Netherlands. Imperial College Press 1999, ISBN 1-86094-235-0 [contents] - 1998
- [j2]Erik H. D'Hollander, Fubo Zhang, Qi Wang:
The FORTRAN Parallel Transformer and its Programming. Inf. Sci. 106(3-4): 293-317 (1998) - [e2]Erik H. D'Hollander, Gerhard R. Joubert, Frans J. Peters, Ulrich Trottenberg:
Parallel Computing: Fundamentals, Applications and New Directions, Proceedings of the Conference ParCo'97, 19-22 September 1997, Bonn, Germany. Advances in Parallel Computing 12, Elsevier 1998 [contents] - 1997
- [c10]Qi Wang, Yijun Yu, Erik H. D'Hollander:
Visualizing the Iteration Space in PEFPT. HPCN Europe 1997: 908-915 - 1996
- [c9]Erik H. D'Hollander, Fubo Zhang:
PVM Code Generator for the Fortran Parallel Transformer. PDPTA 1996: 341- - [e1]Erik H. D'Hollander, Gerhard R. Joubert, Frans J. Peters, Denis Trystram:
Parallel Computing: State-of-the-Art and Perspectives, Proceedings of the conference ParCo 1995, Gent, Belgium, September 1995. Advances in Parallel Computing 11, Elsevier 1996, ISBN 0-444-82490-1 [contents] - 1994
- [c8]Fubo Zhang, Erik H. D'Hollander:
Extracting the Parallelism in Program with Unstructured Control Statements. ICPADS 1994: 264-271 - [c7]Fubo Zhang, Erik H. D'Hollander:
Enhancing Parallelism by Removing Cyclic Data Dependencies. PARLE 1994: 387-397 - 1993
- [c6]Fubo Zhang, Erik H. D'Hollander:
Using Hammock Graphs to Eliminate Nonstructured Branch Statements. PARLE 1993: 732-735 - [c5]Wim Van de Velde, Johan Opsommer, Erik H. D'Hollander:
Performance Modeling of Microkernel Thread Schedulers for Shared Memory Multiprocessors. PARLE 1993: 736-739 - 1992
- [j1]Erik H. D'Hollander:
Partitioning and Labeling of Loops by Unimodular Transformations. IEEE Trans. Parallel Distributed Syst. 3(4): 465-476 (1992) - 1991
- [c4]Erik H. D'Hollander, Yves Devis:
Directed Taskgraph Scheduling Using Simulated Annealing. ICPP (2) 1991: 180-185
1980 – 1989
- 1989
- [c3]Erik H. D'Hollander:
Partitioning and Labeling of Index Sets in DO Loops with Constant Dependence Vectors. ICPP (2) 1989: 139-144 - 1987
- [c2]Erik H. D'Hollander, Johan Opsommer:
Implementation of An Automatic Program Partitioner on a Homogeneous Multiprocessor. ICPP 1987: 517-520 - 1983
- [c1]Erik H. D'Hollander, H. Simoens:
A Simulator of Homogeneous Multiprocessor Systems. ESC 1983: 187-192
Coauthor Index
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last updated on 2025-01-13 02:05 CET by the dblp team
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