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Publication search results
found 69 matches
- 2005
- Darren Aaberge, Ken Mockler, Dieu Van Dinh, Raoul Belleau, Tim Donovan, Reid Hewlitt:
Meeting the Test Challenges of the 1 Gbps Parallel RapidIO Interface with New Automatic Test Equipment Capabilities. VTS 2005: 75-84 - Erkan Acar, Sule Ozev:
Diagnosis of Failing Component in RF Receivers through Adaptive Full-Path Measurements. VTS 2005: 374-379 - Dhruva Acharyya, Jim Plusquellic:
Hardware Results Demonstrating Defect Detection Using Power Supply Signal Measurements. VTS 2005: 433-438 - Nisar Ahmed, C. P. Ravikumar, Mohammad Tehranipoor, Jim Plusquellic:
At-Speed Transition Fault Testing With Low Speed Scan Enable. VTS 2005: 42-47 - Selim Sermet Akbay, Abhijit Chatterjee:
Built-In Test of RF Components Using Mapped Feature Extraction Sensors. VTS 2005: 243-248 - Ahmad A. Al-Yamani, Erik Chmelar, Mikhail Grinchuck:
Segmented Addressable Scan Architecture. VTS 2005: 405-411 - Ghazanfar Asadi, Mehdi Baradaran Tahoori:
Soft Error Mitigation for SRAM-Based FPGAs. VTS 2005: 207-212 - Mohamed Azimane, Ananta K. Majhi, Guido Gronthoud, Maurice Lousberg:
A New Algorithm for Dynamic Faults Detection in RAMs. VTS 2005: 177-182 - Ismet Bayraktaroglu, Olivier Caty, Yickkei Wong:
Highly Configurable Programmable Built-In Self Test Architecture for High-Speed Memories. VTS 2005: 21-26 - Matthias Beck, Olivier Barondeau, Frank Poehl, Xijiang Lin, Ron Press:
Measures to Improve Delay Fault Testing on Low-Cost Testers - A Case Study. VTS 2005: 223-228 - Soumendu Bhattacharya, Abhijit Chatterjee:
Production Test Methods for Measuring 'Out-of-Band' Interference of Ultra Wide Band (UWB) Devices. VTS 2005: 137-142 - Dilip K. Bhavsar:
A Built-in Self-Test Method for Write-only Content Addressable Memories. VTS 2005: 9-14 - Sreejit Chakravarty, Yi-Shing Chang, Hiep Hoang, Sridhar Jayaraman, Silvio Picano, Cheryl Prunty, Eric W. Savage, Rehan Sheikh, Eric N. Tran, Khen Wee:
Experimental Evaluation of Bridge Patterns for a High Performance Microprocessor. VTS 2005: 337-342 - Yi-Shing Chang, Sreejit Chakravarty, Hiep Hoang, Nick Thorpe, Khen Wee:
Transition Tests for High Performance Microprocessors. VTS 2005: 29-34 - Qikai Chen, Hamid Mahmoodi-Meimand, Swarup Bhunia, Kaushik Roy:
Modeling and Testing of SRAM for New Failure Mechanisms Due to Process Variations in Nanoscale CMOS. VTS 2005: 292-297 - Min-Hao Chiu, Chien-Mo James Li:
Jump Scan: A DFT Technique for Low Power Testing. VTS 2005: 277-282 - Scott Davidson:
Towards an Understanding of No Trouble Found Devices. VTS 2005: 147-152 - Rao Desineni, R. D. (Shawn) Blanton:
Diagnosis of Arbitrary Defects Using Neighborhood Function Extraction. VTS 2005: 366-373 - Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian Hage-Hassan:
Data Retention Fault in SRAM Memories: Analysis and Detection Procedures. VTS 2005: 183-188 - Abdulkadir Utku Diril, Yuvraj Singh Dhillon, Abhijit Chatterjee, Adit D. Singh:
Design of Adaptive Nanometer Digital Systems for Effective Control of Soft Error Tolerance. VTS 2005: 298-303 - Cameron Dryden:
Survey of Design and Process Failure Modes for High-Speed SerDes in Nanometer CMOS. VTS 2005: 285-291 - Norbert Dumas, Florence Azaïs, Laurent Latorre, Pascal Nouet:
On-Chip Electro-Thermal Stimulus Generation for a MEMS-Based Magnetic Field Sensor. VTS 2005: 213-218 - Shalini Ghosh, Sugato Basu, Nur A. Touba:
Synthesis of Low Power CED Circuits Based on Parity Codes. VTS 2005: 315-320 - Abdul Wahid Hakmi, Hans-Joachim Wunderlich, Valentin Gherman, Michael Garbers, Jürgen Schlöffel:
Implementing a Scheme for External Deterministic Self-Test. VTS 2005: 101-106 - Achintya Halder, Abhijit Chatterjee:
Low-Cost Alternate EVM Test for Wireless Receiver Systems. VTS 2005: 255-260 - Gurgen Harutunyan, Valery A. Vardanian, Yervant Zorian:
Minimal March Tests for Unlinked Static Faults in Random Access Memories. VTS 2005: 53-59 - Dongwoo Hong, Cameron Dryden, Gordon Saksena:
An Efficient Random Jitter Measurement Technique Using Fast Comparator Sampling. VTS 2005: 123-130 - Hitoshi Iwai, Atsushi Nakayama, Naoko Itoga, Kotaro Omata:
Cantilever Type Probe Card for At-Speed Memory Test on Wafer. VTS 2005: 85-89 - Anup P. Jose, Keith A. Jenkins, Scott K. Reynolds:
On-Chip Spectrum Analyzer for Analog Built-In Self Test. VTS 2005: 131-136 - Kirti Joshi, Eric W. MacDonald:
Reduction of Instantaneous Power by Ripple Scan Clocking. VTS 2005: 271-276
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