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Publication search results
found 79 matches
- 2007
- Behnam Amelifard, Massoud Pedram:
Design of an efficient power delivery network in an soc to enable dynamic power management. ISLPED 2007: 328-333 - Asha Balijepalli, Saurabh Sinha, Yu Cao:
Compact modeling of carbon nanotube transistor for early stage process-design exploration. ISLPED 2007: 2-7 - Nilanjan Banerjee, Jung Hwan Choi, Kaushik Roy:
A process variation aware low power synthesis methodology for fixed-point FIR filters. ISLPED 2007: 147-152 - Luiz André Barroso:
All watts considered. ISLPED 2007: 346 - Praveen Bhojwani, Jason D. Lee, Rabi N. Mahapatra:
SAPP: scalable and adaptable peak power management in nocs. ISLPED 2007: 340-345 - Shekhar Borkar, William J. Dally:
Future of on-chip interconnection architectures. ISLPED 2007: 122 - Keith A. Bowman
, Alaa R. Alameldeen, Srikanth T. Srinivasan, Chris Wilkerson:
Impact of die-to-die and within-die parameter variations on the throughput distribution of multi-core processors. ISLPED 2007: 50-55 - Chao Lu, Chi-Ying Tsui
, Wing-Hung Ki
:
Vibration energy scavenging and management for ultra low power applications. ISLPED 2007: 316-321 - Robert Chau:
Nanotechnology for low-power and high-speed nanoelectronics applications. ISLPED 2007: 1 - Yiran Chen, Hai Li, Jing Li
, Cheng-Kok Koh:
Variable-latency adder (VL-adder): new arithmetic circuit design practice to overcome NBTI. ISLPED 2007: 195-200 - Min Chen, Gabriel A. Rincón-Mora:
Single inductor, multiple input, multiple output (SIMIMO) power mixer-charger-supply system. ISLPED 2007: 310-315 - Sizhong Chen, Tong Zhang:
Low power soft-output signal detector design for wireless MIMO communication systems. ISLPED 2007: 232-237 - Youngjin Cho, Younghyun Kim
, Naehyuck Chang:
PVS: passive voltage scaling for wireless sensor networks. ISLPED 2007: 135-140 - Jeonghwan Choi, Chen-Yong Cher, Hubertus Franke, Hendrik F. Hamann, Alan J. Weger, Pradip Bose:
Thermal-aware task scheduling at the system software level. ISLPED 2007: 213-218 - Gaurav Dhiman, Tajana Simunic Rosing:
Dynamic voltage frequency scaling for multi-tasking systems using online learning. ISLPED 2007: 207-212 - David E. Duarte, Greg Taylor, Keng L. Wong, Usman Mughal, George L. Geannopoulos:
Advanced thermal sensing circuit and test techniques used in a high performance 65nm processor. ISLPED 2007: 304-309 - Hanif Fatemi, Behnam Amelifard, Massoud Pedram:
Power optimal MTCMOS repeater insertion for global buses. ISLPED 2007: 98-103 - Imad A. Ferzli, Farid N. Najm, Lars Kruse:
Early power grid verification under circuit current uncertainties. ISLPED 2007: 116-121 - Olga Golubeva, Mirko Loghi, Enrico Macii, Massimo Poncino:
Locality-driven architectural cache sub-banking for leakage energy reduction. ISLPED 2007: 274-279 - Jie Gu, Hanyong Eom, Chris H. Kim:
Sleep transistor sizing and control for resonant supply noise damping. ISLPED 2007: 80-85 - Erika Gunadi, Mikko H. Lipasti:
Power-aware operand delivery. ISLPED 2007: 375-378 - Meeta Sharma Gupta, Krishna K. Rangan, Michael D. Smith, Gu-Yeon Wei, David M. Brooks:
Towards a software approach to mitigate voltage emergencies. ISLPED 2007: 123-128 - Heather Hanson, Stephen W. Keckler, Soraya Ghiasi, Karthick Rajamani, Freeman L. Rawson III, Juan Rubio:
Thermal response to DVFS: analysis with an Intel Pentium M. ISLPED 2007: 219-224 - Domenik Helms, Olaf Meyer, Marko Hoyer, Wolfgang Nebel:
Voltage- and ABB-island optimization in high level synthesis. ISLPED 2007: 153-158 - Sebastian Herbert, Diana Marculescu
:
Analysis of dynamic voltage/frequency scaling in chip-multiprocessors. ISLPED 2007: 38-43 - Jen-Wei Hsieh, Tei-Wei Kuo
, Po-Liang Wu, Yu-Chung Huang:
Energy-efficient and performance-enhanced disks using flash-memory cache. ISLPED 2007: 334-339 - Myeong-Eun Hwang, Seong-Ook Jung, Kaushik Roy:
Slope interconnect effort: gate-interconnect interdependentdelay model for CMOS logic gates. ISLPED 2007: 387-390 - Ravi Jenkal, W. Rhett Davis
:
An architecture for energy efficient sphere decoding. ISLPED 2007: 244-249 - Rajiv V. Joshi, Rouwaida Kanj, Keunwoo Kim, Richard Q. Williams, Ching-Te Chuang:
A floating-body dynamic supply boosting technique for low-voltage sram in nanoscale PD/SOI CMOS technologies. ISLPED 2007: 8-13 - Andrew B. Kahng, Swamy Muddu, Puneet Sharma:
Detailed placement for leakage reduction using systematic through-pitch variation. ISLPED 2007: 110-115
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retrieved on 2024-07-19 05:41 CEST from data curated by the dblp team
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