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Publication search results
found 32 matches
- 2006
- JaeWoong Chung, Hassan Chafi, Chi Cao Minh, Austen McDonald, Brian D. Carlstrom, Christos Kozyrakis, Kunle Olukotun:
The common case transactional behavior of multithreaded programs. HPCA 2006: 266-277 - Kypros Constantinides, Stephen Plaza, Jason A. Blome, Bin Zhang, Valeria Bertacco, Scott A. Mahlke, Todd M. Austin, Michael Orshansky:
BulletProof: a defect-tolerant CMP switch architecture. HPCA 2006: 5-16 - Philip G. Emma:
Industrial Perspectives: The Next Roadblocks in SOC Evolution: On-Chip Storage Capacity and Off-Chip Bandwidth. HPCA 2006: 201-201 - Alex Gontmakher, Avi Mendelson, Assaf Schuster, Gregory Shklover:
Speculative synchronization and thread management for fine granularity threads. HPCA 2006: 278-287 - Shiliang Hu, Ilhyun Kim, Mikko H. Lipasti, James E. Smith:
An approach for implementing efficient superscalar CISC processors. HPCA 2006: 41-52 - Ruke Huang, Alok Garg, Michael C. Huang:
Software-hardware cooperative memory disambiguation. HPCA 2006: 244-253 - Canturk Isci, Margaret Martonosi:
Phase characterization for power: evaluating control-flow-based and event-counter-based techniques. HPCA 2006: 121-132 - Aamer Jaleel, Matthew Mattina, Bruce L. Jacob:
Last level cache (LLC) performance of data mining workloads on a CMP - a case study of parallel bioinformatics workloads. HPCA 2006: 88-98 - P. J. Joseph, Kapil Vaswani, Matthew J. Thazhuthaveetil:
Construction and use of linear regression models for processor performance analysis. HPCA 2006: 99-108 - Youngjae Kim, Sudhanva Gurumurthi, Anand Sivasubramaniam:
Understanding the performance-temperature interactions in disk I/O of server workloads. HPCA 2006: 176-186 - Sumeet Kumar, Aneesh Aggarwal:
Reducing resource redundancy for concurrent error detection techniques in high performance microprocessors. HPCA 2006: 212-221 - Yingmin Li, Benjamin C. Lee, David M. Brooks, Zhigang Hu, Kevin Skadron:
CMP design space exploration subject to physical constraints. HPCA 2006: 17-28 - Jian Li, José F. Martínez:
Dynamic power-performance adaptation of parallel computation on chip multiprocessors. HPCA 2006: 77-87 - Chaiyasit Manovit, Sudheendra Hangal:
Completely verifying memory consistency of test program executions. HPCA 2006: 166-175 - Kevin E. Moore, Jayaram Bobba, Michelle J. Moravan, Mark D. Hill, David A. Wood:
LogTM: log-based transactional memory. HPCA 2006: 254-265 - Jun Nakano, Pablo Montesinos, Kourosh Gharachorloo, Josep Torrellas:
ReViveI/O: efficient handling of I/O in highly-available rollback-recovery servers. HPCA 2006: 200-211 - Vivek Pandey, Weihang Jiang, Yuanyuan Zhou, Ricardo Bianchini:
DMA-aware memory energy management. HPCA 2006: 133-144 - David A. Penry, Daniel Fay, David Hodgdon, Ryan Wells, Graham Schelle, David I. August, Dan Connors:
Exploiting parallelism and structure to accelerate the simulation of chip multi-processors. HPCA 2006: 29-40 - Miquel Pericàs, Adrián Cristal, Rubén González, Daniel A. Jiménez, Mateo Valero:
A decoupled KILO-instruction processor. HPCA 2006: 53-64 - Milos Prvulovic:
CORD: cost-effective (and nearly overhead-free) order-recording and data race detection. HPCA 2006: 232-243 - Prateek Pujara, Aneesh Aggarwal:
Increasing the cache efficiency by eliminating noise. HPCA 2006: 145-154 - Renato Recio:
Industrial Perspectives: System IO Network Evolution - Closing Requirement Gaps. HPCA 2006: 201-201 - Nicholas Riley, Craig B. Zilles:
Probabilistic counter updates for predictor hysteresis and stratification. HPCA 2006: 110-120 - Joseph J. Sharkey, Dmitry V. Ponomarev:
Efficient instruction schedulers for SMT processors. HPCA 2006: 288-298 - Doug E. Shaw:
New architectures for a new biology. HPCA 2006: 4 - Weidong Shi, Joshua B. Fryman, Guofei Gu, Hsien-Hsin S. Lee, Youtao Zhang, Jun Yang:
InfoShield: a security architecture for protecting information usage in memory. HPCA 2006: 222-231 - Per Stenström:
Chip-multiprocessing and beyond. HPCA 2006: 109 - Samantika Subramaniam, Gabriel H. Loh:
Store vectors for scalable memory dependence prediction and scheduling. HPCA 2006: 65-76 - Ravi K. Venkatesan, Stephen Herr, Eric Rotenberg:
Retention-aware placement in DRAM (RAPID): software methods for quasi-non-volatile DRAM. HPCA 2006: 155-165 - Raj Yavatkar:
Industrial Perspectives: Platform Design Challenges with Many cores. HPCA 2006: 201-201
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retrieved on 2024-05-27 20:42 CEST from data curated by the dblp team
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