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@article{DBLP:journals/jolpe/AlbeaPVPBL11,
  author       = {Carolina Albea and
                  Diego Puschini and
                  Pascal Vivet and
                  Ivan Miro Panades and
                  Edith Beign{\'{e}} and
                  Suzanne Lesecq},
  title        = {Architecture and Robust Control of a Digital Frequency-Locked Loop
                  for Fine-Grain Dynamic Voltage and Frequency Scaling in Globally Asynchronous
                  Locally Synchronous Structures},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {3},
  pages        = {328--340},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1141},
  doi          = {10.1166/JOLPE.2011.1141},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/AlbeaPVPBL11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/AlmukhaizimAS11,
  author       = {Sobeeh Almukhaizim and
                  Eman AlQuraishi and
                  Ozgur Sinanoglu},
  title        = {Test Power Reduction via Deterministic Alignment of Stimulus and Response
                  Bits},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {4},
  pages        = {573--584},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1152},
  doi          = {10.1166/JOLPE.2011.1152},
  timestamp    = {Tue, 29 Dec 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jolpe/AlmukhaizimAS11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/BachmannGSWH11,
  author       = {Christian Bachmann and
                  Andreas Genser and
                  Christian Steger and
                  Reinhold Weiss and
                  Josef Haid},
  title        = {An Automated Power Emulation Framework for Embedded Software - Detecting
                  Power-Critical Code Regions and Optimizing Software-Induced Power
                  Consumption Peaks},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {2},
  pages        = {255--264},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1134},
  doi          = {10.1166/JOLPE.2011.1134},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/BachmannGSWH11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/BanerjeeMMPC11,
  author       = {Shibaji Banerjee and
                  Jimson Mathew and
                  Saraju P. Mohanty and
                  Dhiraj K. Pradhan and
                  Maciej J. Ciesielski},
  title        = {A Variation-Aware Taylor Expansion Diagram-Based Approach for Nano-CMOS
                  Register-Transfer Level Leakage Optimization},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {4},
  pages        = {471--481},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1160},
  doi          = {10.1166/JOLPE.2011.1160},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/BanerjeeMMPC11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/BathilyAHP11,
  author       = {Malal Bathily and
                  Bruno Allard and
                  Frederic Hasbani and
                  Vincent Pinon},
  title        = {Low-Power, Battery-Operated, Large-Bandwidth Analog Integrated {DC/DC}
                  Step-Down Converters},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {1},
  pages        = {49--60},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1116},
  doi          = {10.1166/JOLPE.2011.1116},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/BathilyAHP11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/BazSXY11,
  author       = {Abdullah Baz and
                  Delong Shang and
                  Fei Xia and
                  Alexandre Yakovlev},
  title        = {Self-Timed {SRAM} for Energy Harvesting Systems},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {2},
  pages        = {274--284},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1136},
  doi          = {10.1166/JOLPE.2011.1136},
  timestamp    = {Tue, 12 Nov 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jolpe/BazSXY11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/BongJMK11,
  author       = {Ji{-}Hye Bong and
                  Kwan{-}Hee Jo and
                  Kyeong{-}Sik Min and
                  Sung{-}Mo Kang},
  title        = {Oxide-Tunneling Leakage Suppressed {SRAM} for Sub-65-nm Very Large
                  Scale Integrated Circuits},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {1},
  pages        = {87--95},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1119},
  doi          = {10.1166/JOLPE.2011.1119},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/BongJMK11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/BoroujeniPL11,
  author       = {Bahman Kheradmand Boroujeni and
                  Christian Piguet and
                  Yusuf Leblebici},
  title        = {Optimal Logic Architecture and Supply Voltage Selection Method to
                  Reduce the Impact of the Threshold Voltage Variation on the Timing},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {2},
  pages        = {285--293},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1137},
  doi          = {10.1166/JOLPE.2011.1137},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/BoroujeniPL11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/BousquetCS11,
  author       = {Laurent Bousquet and
                  Fabio Cenni and
                  Emmanuel Simeu},
  title        = {Inclusion of Power Consumption Information in High-Level Modeling
                  of Linear Analog Blocks},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {4},
  pages        = {541--551},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1156},
  doi          = {10.1166/JOLPE.2011.1156},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/BousquetCS11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/BroussevT11,
  author       = {Svetozar S. Broussev and
                  Nikolay T. Tchamov},
  title        = {Evaluation of Parasitic Components in {LC} Oscillators by Time-Varying
                  Root-Locus},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {2},
  pages        = {209--217},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1129},
  doi          = {10.1166/JOLPE.2011.1129},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/BroussevT11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/CalvoGDPSVAM11,
  author       = {Daniel Calvo and
                  Pablo Gonz{\'{a}}lez and
                  Luis Diaz and
                  Hector Posadas and
                  Pablo S{\'{a}}nchez and
                  Eugenio Villar and
                  Andrea Acquaviva and
                  Enrico Macii},
  title        = {A Multi-Processing Systems-on-Chip Native Simulation Framework for
                  Power and Thermal-Aware Design},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {1},
  pages        = {2--16},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1112},
  doi          = {10.1166/JOLPE.2011.1112},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/CalvoGDPSVAM11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/ChampacKPVZ11,
  author       = {V{\'{\i}}ctor H. Champac and
                  Fernanda Gusm{\~{a}}o de Lima Kastensmidt and
                  Let{\'{\i}}cia Maria Veiras Bolzani Poehls and
                  Fabian Vargas and
                  Yervant Zorian},
  title        = {12th "IEEE Latin-American Test Workshop" Porto de Galinhas, Brazil,
                  27-30 March 2011},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {4},
  pages        = {529--530},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1164},
  doi          = {10.1166/JOLPE.2011.1164},
  timestamp    = {Fri, 03 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/ChampacKPVZ11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/ChandrachoodanB11,
  author       = {Nitin Chandrachoodan and
                  Shankar Balachandran},
  title        = {24th "IEEE International Conference on {VLSI} Design" Chennai, India,
                  2-7 January 2011},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {4},
  pages        = {459},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1163},
  doi          = {10.1166/JOLPE.2011.1163},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/ChandrachoodanB11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/CorneliusTT11,
  author       = {Claas Cornelius and
                  Frank Sill Torres and
                  Dirk Timmermann},
  title        = {Power-Efficient Application of Sleep Transistors to Enhance the Reliability
                  of Integrated Circuits},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {4},
  pages        = {552--561},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1154},
  doi          = {10.1166/JOLPE.2011.1154},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/CorneliusTT11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/DattaB11,
  author       = {Basab Datta and
                  Wayne P. Burleson},
  title        = {Temperature Effects on Practical Energy Optimization of Sub-Threshold
                  Circuits in Deep Nanometer Technologies},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {3},
  pages        = {403--419},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1148},
  doi          = {10.1166/JOLPE.2011.1148},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/DattaB11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/FaisalJAB11,
  author       = {Md. Ibrahim Faisal and
                  Zahra Jeddi and
                  Esmaeil Amini and
                  Magdy A. Bayoumi},
  title        = {A Flexible Architecture for Finite Field Galois Fields(2\({}^{\mbox{\emph{m}}}\))
                  Arithmetic Processor},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {3},
  pages        = {314--327},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1150},
  doi          = {10.1166/JOLPE.2011.1150},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/FaisalJAB11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/FreijedoVCMRSVTT11,
  author       = {Judit Freijedo and
                  Mar{\'{\i}}a Dolores Vald{\'{e}}s and
                  Luc{\'{\i}}a Costas and
                  Mar{\'{\i}}a Jos{\'{e}} Moure and
                  Juan J. Rodr{\'{\i}}guez{-}Andina and
                  Jorge Semi{\~{a}}o and
                  Fabian Vargas and
                  Isabel C. Teixeira and
                  Jo{\~{a}}o Paulo Teixeira},
  title        = {Lower \emph{V}\({}_{\mbox{DD}}\) Operation of FPGA-Based Digital Circuits
                  Through Delay Modeling and Time Borrowing},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {2},
  pages        = {185--198},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1127},
  doi          = {10.1166/JOLPE.2011.1127},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/FreijedoVCMRSVTT11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/GuerreroMJBROV11,
  author       = {David Guerrero Martos and
                  Alejandro Mill{\'{a}}n and
                  Jorge Juan and
                  Manuel J. Bellido and
                  Paulino Ruiz{-}de{-}Clavijo and
                  Enrique Ost{\'{u}}a and
                  Julian Viejo},
  title        = {Studying the Viability of Static Complementary Metal-Oxide-Semiconductor
                  Gates with a Large Number of Inputs When Using Separate Transistor
                  Wells},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {3},
  pages        = {444--452},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1145},
  doi          = {10.1166/JOLPE.2011.1145},
  timestamp    = {Mon, 16 Nov 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jolpe/GuerreroMJBROV11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/HicksK11,
  author       = {J. Kevin Hicks and
                  Dhireesha Kudithipudi},
  title        = {Hybrid Subthreshold and Nearthreshold Design Methodology for Energy
                  Minimization},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {2},
  pages        = {172--184},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1126},
  doi          = {10.1166/JOLPE.2011.1126},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/HicksK11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/HuLCW11,
  author       = {Miao Hu and
                  Hai (Helen) Li and
                  Yiran Chen and
                  Xiaobin Wang},
  title        = {Spintronic Memristor: Compact Model and Statistical Analysis},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {2},
  pages        = {234--244},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1131},
  doi          = {10.1166/JOLPE.2011.1131},
  timestamp    = {Mon, 04 Jul 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/HuLCW11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/JacintoMS11,
  author       = {Bruno Jacinto and
                  Carlos Moreira and
                  Marcelino B. Santos},
  title        = {Digital Sliding Mode Control of {DC-DC} Buck Converters},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {2},
  pages        = {218--233},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1130},
  doi          = {10.1166/JOLPE.2011.1130},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/JacintoMS11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/JainSPR11,
  author       = {Arvind Jain and
                  Sundarrajan Subramanian and
                  Rubin A. Parekhji and
                  Srivaths Ravi},
  title        = {Design Techniques with Multiple Scan Compression CoDecs for Low Power
                  and High Quality Scan Test},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {4},
  pages        = {502--515},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1161},
  doi          = {10.1166/JOLPE.2011.1161},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/JainSPR11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/KanungoD11,
  author       = {Jitendra Kanungo and
                  S. Dasgupta},
  title        = {An Efficient Single Phase Adiabatic Logic and Its Application to Combinational
                  and Sequential Design},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {3},
  pages        = {381--392},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1143},
  doi          = {10.1166/JOLPE.2011.1143},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/KanungoD11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/KapoorV11,
  author       = {Bhanu Kapoor and
                  Shireesh Verma},
  title        = {Power Management Design and Verification},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {1},
  pages        = {41--48},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1115},
  doi          = {10.1166/JOLPE.2011.1115},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/KapoorV11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/KimA11,
  author       = {Kyungseok Kim and
                  Vishwani D. Agrawal},
  title        = {Ultra Low Energy {CMOS} Logic Using Below-Threshold Dual-Voltage Supply},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {4},
  pages        = {460--470},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1162},
  doi          = {10.1166/JOLPE.2011.1162},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/KimA11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/KisslerHT11,
  author       = {Dmitrij Kissler and
                  Frank Hannig and
                  J{\"{u}}rgen Teich},
  title        = {Efficient Evaluation of Power/Area/Latency Design Trade-Offs for Coarse-Grained
                  Reconfigurable Processor Arrays},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {1},
  pages        = {29--40},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1114},
  doi          = {10.1166/JOLPE.2011.1114},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/KisslerHT11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/KulkarniGE11,
  author       = {Parag Kulkarni and
                  Puneet Gupta and
                  Milos D. Ercegovac},
  title        = {Trading Accuracy for Power in a Multiplier Architecture},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {4},
  pages        = {490--501},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1157},
  doi          = {10.1166/JOLPE.2011.1157},
  timestamp    = {Thu, 28 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/KulkarniGE11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/KunduP11,
  author       = {Tapas Kumar Kundu and
                  Kolin Paul},
  title        = {Analyzing and Improving Performance and Energy Efficiency of Android},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {4},
  pages        = {516--528},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1158},
  doi          = {10.1166/JOLPE.2011.1158},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/KunduP11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/LazzariFFM11,
  author       = {Cristiano Lazzari and
                  Jorge R. Fernandes and
                  Paulo F. Flores and
                  Jos{\'{e}} Monteiro},
  title        = {Low Power Multiple-Value Voltage-Mode Look-Up Table for Quaternary
                  Field Programmable Gate Arrays},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {2},
  pages        = {294--301},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1138},
  doi          = {10.1166/JOLPE.2011.1138},
  timestamp    = {Wed, 23 Feb 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jolpe/LazzariFFM11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/Leuken11,
  author       = {Ren{\'{e}} van Leuken},
  title        = {Selected Articles from the {PATMOS} 2010 Workshop},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {2},
  pages        = {254},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1133},
  doi          = {10.1166/JOLPE.2011.1133},
  timestamp    = {Tue, 13 Sep 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/Leuken11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/MabroukiTDB11,
  author       = {Aya Mabrouki and
                  Thierry Taris and
                  Yann Deval and
                  Jean{-}Baptiste B{\'{e}}gueret},
  title        = {An Optimum Body Biasing for Gain and Linearity Control in {CMOS} Low-Noise
                  Amplifiers},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {2},
  pages        = {199--208},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1128},
  doi          = {10.1166/JOLPE.2011.1128},
  timestamp    = {Mon, 04 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/MabroukiTDB11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/Majzoub11,
  author       = {Sohaib Majzoub},
  title        = {Instruction-Based Voltage Scaling for Power Reduction in {SIMD} MPSoCs},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {2},
  pages        = {141--147},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1123},
  doi          = {10.1166/JOLPE.2011.1123},
  timestamp    = {Mon, 03 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jolpe/Majzoub11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/MauryaC11,
  author       = {Satendra Kumar Maurya and
                  Lawrence T. Clark},
  title        = {A Specialized Static Content Addressable Memory for Longest Prefix
                  Matching in Internet Protocol Routing},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {3},
  pages        = {350--363},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1142},
  doi          = {10.1166/JOLPE.2011.1142},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/MauryaC11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/MehrotraESHP11,
  author       = {Rashmi Mehrotra and
                  Tom English and
                  Michel P. Schellekens and
                  Steve Hollands and
                  Emanuel M. Popovici},
  title        = {Timing-Driven Power Optimisation and Power-Driven Timing Optimisation
                  of Combinational Circuits},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {3},
  pages        = {364--380},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1149},
  doi          = {10.1166/JOLPE.2011.1149},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/MehrotraESHP11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/MericliOHM11,
  author       = {Benjamin S. Mericli and
                  Ajay Ogirala and
                  Peter J. Hawrylak and
                  Marlin H. Mickle},
  title        = {A Passive Radio Frequency Amplifier for Radio Frequency Identification
                  Tags},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {3},
  pages        = {453--458},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1139},
  doi          = {10.1166/JOLPE.2011.1139},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/MericliOHM11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/NandaM11,
  author       = {Rashmi Nanda and
                  Dejan Markovic},
  title        = {Energy-Efficient Retiming and Scheduling of Datapath-Dominant Digital
                  Systems},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {3},
  pages        = {341--349},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1147},
  doi          = {10.1166/JOLPE.2011.1147},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/NandaM11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/OliveiraSTST11,
  author       = {R. S. Oliveira and
                  Jorge Semi{\~{a}}o and
                  Isabel C. Teixeira and
                  Marcelino B. Santos and
                  Jo{\~{a}}o Paulo Teixeira},
  title        = {On-Line {BIST} for Performance Failure Prediction Under NBTI-Induced
                  Aging in Safety-Critical Applications},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {4},
  pages        = {562--572},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1155},
  doi          = {10.1166/JOLPE.2011.1155},
  timestamp    = {Fri, 30 Sep 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/OliveiraSTST11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/PadmawarRC11,
  author       = {Mandar Padmawar and
                  Sanghamitra Roy and
                  Koushik Chakraborty},
  title        = {Microprocessor Power Supply Noise Aware Floorplanning Using a Circuit-Architectural
                  Framework},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {3},
  pages        = {303--313},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1140},
  doi          = {10.1166/JOLPE.2011.1140},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/PadmawarRC11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/PatraCC11,
  author       = {Biswajit Patra and
                  Nayan Chandak and
                  Amlan Chakrabarti},
  title        = {An Efficient Methodology for Full Chip Signal ElectroMigration Analysis
                  for Advanced Technology Node Designs},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {3},
  pages        = {420--425},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1151},
  doi          = {10.1166/JOLPE.2011.1151},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/PatraCC11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/PomeranzR11,
  author       = {Irith Pomeranz and
                  Sudhakar M. Reddy},
  title        = {Transparent-Segmented-Scan without the Routing Overhead of Segmented-Scan},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {2},
  pages        = {245--253},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1132},
  doi          = {10.1166/JOLPE.2011.1132},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/PomeranzR11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/PoolLS11,
  author       = {Jeff Pool and
                  Anselmo Lastra and
                  Montek Singh},
  title        = {Power-Gated Arithmetic Circuits for Energy-Precision Tradeoffs in
                  Mobile Graphics Processing Units},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {2},
  pages        = {148--162},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1124},
  doi          = {10.1166/JOLPE.2011.1124},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/PoolLS11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/QianHYC11,
  author       = {Hanhua Qian and
                  Xiwei Huang and
                  Hao Yu and
                  Chip{-}Hong Chang},
  title        = {Cyber-Physical Thermal Management of 3D Multi-Core Cache-Processor
                  System with Microfluidic Cooling},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {1},
  pages        = {110--121},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1121},
  doi          = {10.1166/JOLPE.2011.1121},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/QianHYC11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/RajMBRSD11,
  author       = {Balwinder Raj and
                  Jatin Mitra and
                  Deepak Kumar Bihani and
                  V. Rangharajan and
                  Ashok K. Saxena and
                  Sudeb Dasgupta},
  title        = {Process Variation Tolerant FinFET Based Robust Low Power {SRAM} Cell
                  Design at 32 nm Technology},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {2},
  pages        = {163--171},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1125},
  doi          = {10.1166/JOLPE.2011.1125},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/RajMBRSD11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/ReginiLR11,
  author       = {Edoardo Regini and
                  Daeseob Lim and
                  Tajana Simunic Rosing},
  title        = {Resource Management in Heterogeneous Wireless Sensor Networks},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {2},
  pages        = {123--140},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1122},
  doi          = {10.1166/JOLPE.2011.1122},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/ReginiLR11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/RochaSC11,
  author       = {Jos{\'{e}} F. da Rocha and
                  Marcelino Bicho Dos Santos and
                  Jos{\'{e}} M. Dores Costa},
  title        = {Smart Control of Internal Supply Voltage Spikes in a Low Voltage {DC-DC}
                  Buck Converter},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {3},
  pages        = {426--443},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1146},
  doi          = {10.1166/JOLPE.2011.1146},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/RochaSC11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/SilB11,
  author       = {Abhijit Sil and
                  Magdy A. Bayoumi},
  title        = {A Bit-Interleaved 2-Port Subthreshold 6T {SRAM} Array with High Write-Ability
                  and SNM-Free Read in 90 nm},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {1},
  pages        = {96--109},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1120},
  doi          = {10.1166/JOLPE.2011.1120},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/SilB11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/TangZFWLFLW11,
  author       = {He Tang and
                  Hui Zhao and
                  Siqiang Fan and
                  Xin Wang and
                  Lin Lin and
                  Qiang Fang and
                  Jian Liu and
                  Albert Z. Wang},
  title        = {Design Matrix Analysis for Capacitive Interpolation Flash {ADC}},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {1},
  pages        = {61--70},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1117},
  doi          = {10.1166/JOLPE.2011.1117},
  timestamp    = {Thu, 12 Nov 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jolpe/TangZFWLFLW11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/TimarR11,
  author       = {Andr{\'{a}}s Tim{\'{a}}r and
                  M{\'{a}}rta Rencz},
  title        = {Studying the Influence of Chip Temperatures on Timing Integrity Using
                  Improved Power Modeling},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {4},
  pages        = {531--540},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1153},
  doi          = {10.1166/JOLPE.2011.1153},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/TimarR11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/TovinakereSD11,
  author       = {Vivek D. Tovinakere and
                  Olivier Sentieys and
                  Steven Derrien},
  title        = {A Polynomial Based Approach to Wakeup Time and Energy Estimation in
                  Power-Gated Logic Clusters},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {4},
  pages        = {482--489},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1159},
  doi          = {10.1166/JOLPE.2011.1159},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/TovinakereSD11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/Verma11,
  author       = {Shireesh Verma},
  title        = {\emph{A Special Issue on} Low Power Design and Verification Techniques},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {1},
  pages        = {1},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1111},
  doi          = {10.1166/JOLPE.2011.1111},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/Verma11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/VivetBLZ11,
  author       = {Pascal Vivet and
                  Edith Beign{\'{e}} and
                  Hugo Lebreton and
                  Nacer{-}Eddine Zergainoh},
  title        = {On-line Power Optimization of Data Flow Multi-Core Architecture Based
                  on Vdd-Hopping for Local Dynamic Voltage and Frequency Scaling},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {2},
  pages        = {265--273},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1135},
  doi          = {10.1166/JOLPE.2011.1135},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/VivetBLZ11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/WangM11,
  author       = {Weixun Wang and
                  Prabhat Mishra},
  title        = {Dynamic Reconfiguration of Two-Level Cache Hierarchy in Real-Time
                  Embedded Systems},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {1},
  pages        = {17--28},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1113},
  doi          = {10.1166/JOLPE.2011.1113},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/WangM11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/WuH11,
  author       = {Yangbo Wu and
                  Jianping Hu},
  title        = {Near-Threshold Computing of Clocked Adiabatic Logic with Complementary
                  Pass-Transistor Logic Circuits},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {3},
  pages        = {393--402},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1144},
  doi          = {10.1166/JOLPE.2011.1144},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/WuH11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/ZhangBM11,
  author       = {Yi Zhang and
                  Rajdeep Bondade and
                  Dongsheng Ma},
  title        = {On-Chip Single-Inductor Multiple-Output Power Converter Design with
                  Adaptive Cross Regulation and Supply Variation Control for Power-Efficient
                  {VLSI} Systems},
  journal      = {J. Low Power Electron.},
  volume       = {7},
  number       = {1},
  pages        = {71--86},
  year         = {2011},
  url          = {https://doi.org/10.1166/jolpe.2011.1118},
  doi          = {10.1166/JOLPE.2011.1118},
  timestamp    = {Mon, 24 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/ZhangBM11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}