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@inproceedings{DBLP:conf/fpga/ChowR02,
  author       = {William Chow and
                  Jonathan Rose},
  editor       = {Martine D. F. Schlag and
                  Steve Trimberger},
  title        = {{EVE:} a {CAD} tool for manual placement and pipelining assistance
                  of {FPGA} circuits},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2002, Monterey, CA, USA, February 24-26, 2002},
  pages        = {85--94},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/503048.503061},
  doi          = {10.1145/503048.503061},
  timestamp    = {Tue, 06 Nov 2018 16:58:22 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/ChowR02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/CongLL02,
  author       = {Jason Cong and
                  Yizhou Lin and
                  Wangning Long},
  editor       = {Martine D. F. Schlag and
                  Steve Trimberger},
  title        = {SPFD-based global rewiring},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2002, Monterey, CA, USA, February 24-26, 2002},
  pages        = {77--84},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/503048.503060},
  doi          = {10.1145/503048.503060},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/CongLL02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/CoricLMT02,
  author       = {Srdjan Coric and
                  Miriam Leeser and
                  Eric L. Miller and
                  Marc Trepanier},
  editor       = {Martine D. F. Schlag and
                  Steve Trimberger},
  title        = {Parallel-beam backprojection: an {FPGA} implementation optimized for
                  medical imaging},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2002, Monterey, CA, USA, February 24-26, 2002},
  pages        = {217--226},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/503048.503080},
  doi          = {10.1145/503048.503080},
  timestamp    = {Tue, 05 Nov 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/CoricLMT02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/DalyM02,
  author       = {Alan Daly and
                  William P. Marnane},
  editor       = {Martine D. F. Schlag and
                  Steve Trimberger},
  title        = {Efficient architectures for implementing montgomery modular multiplication
                  and {RSA} modular exponentiation on reconfigurable logic},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2002, Monterey, CA, USA, February 24-26, 2002},
  pages        = {40--49},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/503048.503055},
  doi          = {10.1145/503048.503055},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/DalyM02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/DidoGLPSP02,
  author       = {J. Dido and
                  N. G{\'{e}}raudie and
                  L. Loiseau and
                  O. Payeur and
                  Yvon Savaria and
                  D. Poirier},
  editor       = {Martine D. F. Schlag and
                  Steve Trimberger},
  title        = {A flexible floating-point format for optimizing data-paths and operators
                  in {FPGA} based DSPs},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2002, Monterey, CA, USA, February 24-26, 2002},
  pages        = {50--55},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/503048.503056},
  doi          = {10.1145/503048.503056},
  timestamp    = {Fri, 08 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fpga/DidoGLPSP02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/DinizP02,
  author       = {Pedro C. Diniz and
                  Joonseok Park},
  editor       = {Martine D. F. Schlag and
                  Steve Trimberger},
  title        = {Data reorganization engines for the next generation of system-on-a-chip
                  FPGAs},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2002, Monterey, CA, USA, February 24-26, 2002},
  pages        = {237--244},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/503048.503082},
  doi          = {10.1145/503048.503082},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/DinizP02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/GroverSL02,
  author       = {Radhika S. Grover and
                  Weijia Shang and
                  Qiang Li},
  editor       = {Martine D. F. Schlag and
                  Steve Trimberger},
  title        = {A faster distributed arithmetic architecture for FPGAs},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2002, Monterey, CA, USA, February 24-26, 2002},
  pages        = {31--39},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/503048.503054},
  doi          = {10.1145/503048.503054},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/GroverSL02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/HuttonCKMNPPPSS02,
  author       = {Michael D. Hutton and
                  Vinson Chan and
                  Peter Kazarian and
                  Victor Maruri and
                  Tony Ngai and
                  Jim Park and
                  Rakesh H. Patel and
                  Bruce Pedersen and
                  Jay Schleicher and
                  Sergey Y. Shumarayev},
  editor       = {Martine D. F. Schlag and
                  Steve Trimberger},
  title        = {Interconnect enhancements for a high-speed {PLD} architecture},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2002, Monterey, CA, USA, February 24-26, 2002},
  pages        = {3--10},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/503048.503050},
  doi          = {10.1145/503048.503050},
  timestamp    = {Sat, 28 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/HuttonCKMNPPPSS02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/Kean02,
  author       = {Tom Kean},
  editor       = {Martine D. F. Schlag and
                  Steve Trimberger},
  title        = {Cryptographic rights management of {FPGA} intellectual property cores},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2002, Monterey, CA, USA, February 24-26, 2002},
  pages        = {113--118},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/503048.503065},
  doi          = {10.1145/503048.503065},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/Kean02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/LeeW02,
  author       = {K. K. Lee and
                  D. F. Wong},
  editor       = {Martine D. F. Schlag and
                  Steve Trimberger},
  title        = {Incremental reconfiguration of multi-FPGA systems},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2002, Monterey, CA, USA, February 24-26, 2002},
  pages        = {206--213},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/503048.503078},
  doi          = {10.1145/503048.503078},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fpga/LeeW02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/LemieuxL02,
  author       = {Guy G. Lemieux and
                  David M. Lewis},
  editor       = {Martine D. F. Schlag and
                  Steve Trimberger},
  title        = {Circuit design of routing switches},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2002, Monterey, CA, USA, February 24-26, 2002},
  pages        = {19--28},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/503048.503052},
  doi          = {10.1145/503048.503052},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/LemieuxL02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/LiH02,
  author       = {Zhiyuan Li and
                  Scott Hauck},
  editor       = {Martine D. F. Schlag and
                  Steve Trimberger},
  title        = {Configuration prefetching techniques for partial reconfigurable coprocessor
                  with relocation and defragmentation},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2002, Monterey, CA, USA, February 24-26, 2002},
  pages        = {187--195},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/503048.503076},
  doi          = {10.1145/503048.503076},
  timestamp    = {Mon, 25 Nov 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/LiH02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/MarkovskiyCHYCWD02,
  author       = {Yury Markovsky and
                  Eylon Caspi and
                  Randy Huang and
                  Joseph Yeh and
                  Michael Chu and
                  John Wawrzynek and
                  Andr{\'{e}} DeHon},
  editor       = {Martine D. F. Schlag and
                  Steve Trimberger},
  title        = {Analysis of quasi-static scheduling techniques in a virtualized reconfigurable
                  machine},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2002, Monterey, CA, USA, February 24-26, 2002},
  pages        = {196--205},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/503048.503077},
  doi          = {10.1145/503048.503077},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/MarkovskiyCHYCWD02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/McCrackenZ02,
  author       = {Stuart McCracken and
                  Zeljko Zilic},
  editor       = {Martine D. F. Schlag and
                  Steve Trimberger},
  title        = {{FPGA} test time reduction through a novel interconnect testing scheme},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2002, Monterey, CA, USA, February 24-26, 2002},
  pages        = {136--144},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/503048.503069},
  doi          = {10.1145/503048.503069},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/McCrackenZ02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/PhillipsH02,
  author       = {Shawn Phillips and
                  Scott Hauck},
  editor       = {Martine D. F. Schlag and
                  Steve Trimberger},
  title        = {Automatic layout of domain-specific reconfigurable subsystems for
                  system-on-a-chip},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2002, Monterey, CA, USA, February 24-26, 2002},
  pages        = {165--173},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/503048.503073},
  doi          = {10.1145/503048.503073},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/PhillipsH02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/RobertsonILR02,
  author       = {Ian Robertson and
                  James Irvine and
                  Patrick Lysaght and
                  David Robinson},
  editor       = {Martine D. F. Schlag and
                  Steve Trimberger},
  title        = {Timing verification of dynamically reconfigurable logic for the xilinx
                  virtex {FPGA} series},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2002, Monterey, CA, USA, February 24-26, 2002},
  pages        = {127--135},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/503048.503068},
  doi          = {10.1145/503048.503068},
  timestamp    = {Fri, 03 Dec 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/RobertsonILR02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/SchmitC02,
  author       = {Herman Schmit and
                  Vikas Chandra},
  editor       = {Martine D. F. Schlag and
                  Steve Trimberger},
  title        = {{FPGA} switch block layout and evaluation},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2002, Monterey, CA, USA, February 24-26, 2002},
  pages        = {11--18},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/503048.503051},
  doi          = {10.1145/503048.503051},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/SchmitC02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/SchneiderTO02,
  author       = {Ryan N. Schneider and
                  Laurence E. Turner and
                  Michal M. Okoniewski},
  editor       = {Martine D. F. Schlag and
                  Steve Trimberger},
  title        = {Application of {FPGA} technology to accelerate the finite-difference
                  time-domain {(FDTD)} method},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2002, Monterey, CA, USA, February 24-26, 2002},
  pages        = {97--105},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/503048.503063},
  doi          = {10.1145/503048.503063},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/SchneiderTO02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/ShacklefordTCS02,
  author       = {Barry Shackleford and
                  Motoo Tanaka and
                  Richard J. Carter and
                  Greg Snider},
  editor       = {Martine D. F. Schlag and
                  Steve Trimberger},
  title        = {{FPGA} implementation of neighborhood-of-four cellular automata random
                  number generators},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2002, Monterey, CA, USA, February 24-26, 2002},
  pages        = {106--112},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/503048.503064},
  doi          = {10.1145/503048.503064},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/ShacklefordTCS02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/ShangKB02,
  author       = {Li Shang and
                  Alireza Kaviani and
                  Kusuma Bathala},
  editor       = {Martine D. F. Schlag and
                  Steve Trimberger},
  title        = {Dynamic power consumption in Virtex[tm]-II {FPGA} family},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2002, Monterey, CA, USA, February 24-26, 2002},
  pages        = {157--164},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/503048.503072},
  doi          = {10.1145/503048.503072},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/ShangKB02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/SinghB02,
  author       = {Deshanand P. Singh and
                  Stephen Dean Brown},
  editor       = {Martine D. F. Schlag and
                  Steve Trimberger},
  title        = {Integrated retiming and placement for field programmable gate arrays},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2002, Monterey, CA, USA, February 24-26, 2002},
  pages        = {67--76},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/503048.503059},
  doi          = {10.1145/503048.503059},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fpga/SinghB02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/SinghB02a,
  author       = {Deshanand P. Singh and
                  Stephen Dean Brown},
  editor       = {Martine D. F. Schlag and
                  Steve Trimberger},
  title        = {Constrained clock shifting for field programmable gate arrays},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2002, Monterey, CA, USA, February 24-26, 2002},
  pages        = {121--126},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/503048.503067},
  doi          = {10.1145/503048.503067},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/SinghB02a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/SinghM02,
  author       = {Amit Singh and
                  Malgorzata Marek{-}Sadowska},
  editor       = {Martine D. F. Schlag and
                  Steve Trimberger},
  title        = {Efficient circuit clustering for area and power reduction in FPGAs},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2002, Monterey, CA, USA, February 24-26, 2002},
  pages        = {59--66},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/503048.503058},
  doi          = {10.1145/503048.503058},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/SinghM02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/Snider02,
  author       = {Greg Snider},
  editor       = {Martine D. F. Schlag and
                  Steve Trimberger},
  title        = {Performance-constrained pipelining of software loops onto reconfigurable
                  hardware},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2002, Monterey, CA, USA, February 24-26, 2002},
  pages        = {177--186},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/503048.503075},
  doi          = {10.1145/503048.503075},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/Snider02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/SwaminathanTGB02,
  author       = {Sriram Swaminathan and
                  Russell Tessier and
                  Dennis Goeckel and
                  Wayne P. Burleson},
  editor       = {Martine D. F. Schlag and
                  Steve Trimberger},
  title        = {A dynamically reconfigurable adaptive viterbi decoder},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2002, Monterey, CA, USA, February 24-26, 2002},
  pages        = {227--236},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/503048.503081},
  doi          = {10.1145/503048.503081},
  timestamp    = {Mon, 06 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fpga/SwaminathanTGB02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/YanCW02,
  author       = {Andy Yan and
                  Rebecca Cheng and
                  Steven J. E. Wilton},
  editor       = {Martine D. F. Schlag and
                  Steve Trimberger},
  title        = {On the sensitivity of {FPGA} architectural conclusions to experimental
                  assumptions, tools, and techniques},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2002, Monterey, CA, USA, February 24-26, 2002},
  pages        = {147--156},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/503048.503071},
  doi          = {10.1145/503048.503071},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/YanCW02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@proceedings{DBLP:conf/fpga/2002,
  editor       = {Martine D. F. Schlag and
                  Steve Trimberger},
  title        = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2002, Monterey, CA, USA, February 24-26, 2002},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/503048},
  doi          = {10.1145/503048},
  isbn         = {1-58113-452-5},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/2002.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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