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@article{DBLP:journals/jsa/AbdullaRK00,
  author       = {Mohammed Fadle Abdulla and
                  C. P. Ravikumar and
                  Anshul Kumar},
  title        = {A scheme for multiple on-chip signature checking for embedded {SRAMS}},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {2},
  pages        = {181--199},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(98)00077-0},
  doi          = {10.1016/S1383-7621(98)00077-0},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/AbdullaRK00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/Ahn00,
  author       = {Gail{-}Joon Ahn},
  title        = {Role-based access control in {DCOM}},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {13},
  pages        = {1175--1184},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00017-5},
  doi          = {10.1016/S1383-7621(00)00017-5},
  timestamp    = {Fri, 09 Apr 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/Ahn00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/Al-HoumailyC00,
  author       = {Yousef J. Al{-}Houmaily and
                  Panos K. Chrysanthis},
  title        = {An atomic commit protocol for gigabit-networked distributed database
                  systems},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {9},
  pages        = {809--833},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00040-5},
  doi          = {10.1016/S1383-7621(99)00040-5},
  timestamp    = {Sat, 09 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/Al-HoumailyC00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/Al-MouhamedA00,
  author       = {Mayez A. Al{-}Mouhamed and
                  Adel Al{-}Massarani},
  title        = {Scheduling optimization through iterative refinement},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {10},
  pages        = {851--871},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00043-0},
  doi          = {10.1016/S1383-7621(99)00043-0},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/Al-MouhamedA00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/Al-ShoshanA00,
  author       = {Abdullah I. Al{-}Shoshan and
                  Mohammad A. Aloqeely},
  title        = {Systolic arrays architecture for computing the time-frequency spectrum},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {6},
  pages        = {513--517},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00014-4},
  doi          = {10.1016/S1383-7621(99)00014-4},
  timestamp    = {Fri, 29 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/Al-ShoshanA00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/AlMojelES00,
  author       = {Abdullah I. AlMojel and
                  Tarek A. El{-}Ghazawi and
                  Thomas L. Sterling},
  title        = {Characterizing and representing workloads for parallel computer architectures},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {1},
  pages        = {23--37},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(98)00056-3},
  doi          = {10.1016/S1383-7621(98)00056-3},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/AlMojelES00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/AllahverdiKE00,
  author       = {Novruz M. Allahverdi and
                  Sirzad S. Kahramanli and
                  Kayhan Erciyes},
  title        = {A fault tolerant routing algorithm based on cube algebra for hypercube
                  systems},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {2},
  pages        = {201--205},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(98)00063-0},
  doi          = {10.1016/S1383-7621(98)00063-0},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/AllahverdiKE00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/AlmeidaK00,
  author       = {D. De Almeida and
                  Patrick Kellert},
  title        = {Markovian and analytical models for multiple bus multiprocessor systems
                  with memory blockings},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {5},
  pages        = {455--477},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00006-5},
  doi          = {10.1016/S1383-7621(99)00006-5},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/AlmeidaK00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/AnguitaBP00,
  author       = {Davide Anguita and
                  Andrea Boni and
                  Giancarlo Parodi},
  title        = {A case study of a distributed high-performance computing system for
                  neurocomputing},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {5},
  pages        = {429--438},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00017-X},
  doi          = {10.1016/S1383-7621(99)00017-X},
  timestamp    = {Tue, 21 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jsa/AnguitaBP00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/Aweya00,
  author       = {James Aweya},
  title        = {On the design of {IP} routers Part 1: Router architectures},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {6},
  pages        = {483--511},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00028-4},
  doi          = {10.1016/S1383-7621(99)00028-4},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/Aweya00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/BandyopadhyayB00,
  author       = {A. K. Bandyopadhyay and
                  J. Bandyopadhyay},
  title        = {On the derivation of a correct deadlock free communication kernel
                  for loop connected message passing architecture from its user's specification},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {13},
  pages        = {1257--1261},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00024-2},
  doi          = {10.1016/S1383-7621(00)00024-2},
  timestamp    = {Mon, 29 Jan 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jsa/BandyopadhyayB00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/BardsleyE00,
  author       = {Andrew Bardsley and
                  Doug A. Edwards},
  title        = {Synthesising an asynchronous {DMA} controller with Balsa},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {14},
  pages        = {1309--1319},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00026-6},
  doi          = {10.1016/S1383-7621(00)00026-6},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/BardsleyE00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/BhattacharyaN00,
  author       = {S. Bhattacharya and
                  Mita Nasipuri},
  title        = {Traffic analysis in a double grain Dataflow array processor},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {1},
  pages        = {97--101},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(98)00059-9},
  doi          = {10.1016/S1383-7621(98)00059-9},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/BhattacharyaN00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/BuonannoFS00,
  author       = {Giacomo Buonanno and
                  Franco Fummi and
                  Donatella Sciuto},
  title        = {An extended-UIO-based method for protocol conformance testing},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {3},
  pages        = {225--242},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00003-X},
  doi          = {10.1016/S1383-7621(99)00003-X},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/BuonannoFS00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/BurnsPBGRSS00,
  author       = {Alan Burns and
                  Divya Prasad and
                  Andrea Bondavalli and
                  Felicita Di Giandomenico and
                  Krithi Ramamritham and
                  John A. Stankovic and
                  Lorenzo Strigini},
  title        = {The meaning and role of value in scheduling flexible real-time systems},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {4},
  pages        = {305--325},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00008-9},
  doi          = {10.1016/S1383-7621(99)00008-9},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/BurnsPBGRSS00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/Busquets-MataixGGW00,
  author       = {Jos{\'{e}} V. Busquets{-}Mataix and
                  Daniel Gil and
                  Pedro J. Gil and
                  Andy J. Wellings},
  title        = {Techniques to increase the schedulable utilization of cache-based
                  preemptive real-time systems},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {4},
  pages        = {357--378},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00011-9},
  doi          = {10.1016/S1383-7621(99)00011-9},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/Busquets-MataixGGW00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/CabodiCQ00,
  author       = {Gianpiero Cabodi and
                  Paolo Camurati and
                  Stefano Quer},
  title        = {Symbolic forward/backward traversals of large finite state machines},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {12},
  pages        = {1137--1158},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00014-X},
  doi          = {10.1016/S1383-7621(00)00014-X},
  timestamp    = {Sat, 09 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/CabodiCQ00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/CabriLZ00,
  author       = {Giacomo Cabri and
                  Letizia Leonardi and
                  Franco Zambonelli},
  title        = {Agents for information retrieval: Issues of mobility and coordination},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {15},
  pages        = {1419--1433},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00033-3},
  doi          = {10.1016/S1383-7621(00)00033-3},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/CabriLZ00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/CastorinoC00,
  author       = {A. Castorino and
                  Gianfranco Ciccarella},
  title        = {Algorithms for real-time scheduling of error-cumulative tasks based
                  on the imprecise computation approach},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {7},
  pages        = {587--600},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00024-7},
  doi          = {10.1016/S1383-7621(99)00024-7},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/CastorinoC00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/ChantrapornchaiSH00,
  author       = {Chantana Chantrapornchai and
                  Edwin Hsing{-}Mean Sha and
                  Xiaobo Sharon Hu},
  title        = {Efficient module selections for finding highly acceptable designs
                  based on inclusion scheduling},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {11},
  pages        = {1047--1071},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00009-6},
  doi          = {10.1016/S1383-7621(00)00009-6},
  timestamp    = {Fri, 09 Apr 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/ChantrapornchaiSH00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/ChenCS00,
  author       = {Tzung{-}Shi Chen and
                  Chih{-}Yung Chang and
                  Jang{-}Ping Sheu},
  title        = {Efficient path-based multicast in wormhole-routed mesh networks},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {10},
  pages        = {919--930},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00049-1},
  doi          = {10.1016/S1383-7621(99)00049-1},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/ChenCS00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/ClematisDG00,
  author       = {Andrea Clematis and
                  Gabriella Dodero and
                  Vittoria Gianuzzi},
  title        = {Efficient use of parallel libraries on heterogeneous Networks of Workstations},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {8},
  pages        = {641--653},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00034-X},
  doi          = {10.1016/S1383-7621(99)00034-X},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/ClematisDG00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/DasMD00,
  author       = {Nabanita Das and
                  Krishnendu Mukhopadhyaya and
                  Jayasree Dattagupta},
  title        = {O(n) routing in rearrangeable networks},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {6},
  pages        = {529--542},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00022-3},
  doi          = {10.1016/S1383-7621(99)00022-3},
  timestamp    = {Thu, 01 Dec 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jsa/DasMD00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/DavisEF00,
  author       = {S. J. Davis and
                  C. J. Elston and
                  Paul A. Findlay},
  title        = {Register bypassing in an asynchronous superscalar processor},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {9},
  pages        = {749--764},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00029-6},
  doi          = {10.1016/S1383-7621(99)00029-6},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/DavisEF00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/DjemalMT00,
  author       = {Ridha Djemal and
                  Guy Mazar{\'{e}} and
                  Rached Tourki},
  title        = {Rapid prototyping of an {ATM} programmable associative operator},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {13},
  pages        = {1159--1173},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00015-1},
  doi          = {10.1016/S1383-7621(00)00015-1},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/DjemalMT00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/EeckhoutNB00,
  author       = {Lieven Eeckhout and
                  Henk Neefs and
                  Koen De Bosschere},
  title        = {Early design stage exploration of fixed-length block structured architectures},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {15},
  pages        = {1469--1486},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00036-9},
  doi          = {10.1016/S1383-7621(00)00036-9},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/EeckhoutNB00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/ErcanFD00,
  author       = {Muhammet Fikret Ercan and
                  Yu{-}Fai Fung and
                  M. Suleyman Demokan},
  title        = {Communication in a multi-layer {MIMD} system for computer vision},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {14},
  pages        = {1349--1364},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00029-1},
  doi          = {10.1016/S1383-7621(00)00029-1},
  timestamp    = {Sat, 05 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/ErcanFD00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/GonzalezCP00,
  author       = {Patricia Gonz{\'{a}}lez and
                  Jos{\'{e}} Carlos Cabaleiro and
                  Tom{\'{a}}s F. Pena},
  title        = {On parallel solvers for sparse triangular systems},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {8},
  pages        = {675--685},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00036-3},
  doi          = {10.1016/S1383-7621(99)00036-3},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/GonzalezCP00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/GuanC00,
  author       = {Huiwei Guan and
                  To{-}Yat Cheung},
  title        = {Efficient approaches for constructing a massively parallel processing
                  system},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {13},
  pages        = {1185--1190},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00019-9},
  doi          = {10.1016/S1383-7621(00)00019-9},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/GuanC00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/GuntherD00,
  author       = {Wolfgang G{\"{u}}nther and
                  Rolf Drechsler},
  title        = {ACTion: Combining logic synthesis and technology mapping for MUX-based
                  FPGAs},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {14},
  pages        = {1321--1334},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00027-8},
  doi          = {10.1016/S1383-7621(00)00027-8},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/GuntherD00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/HavingaS00,
  author       = {Paul J. M. Havinga and
                  Gerard J. M. Smit},
  title        = {Design techniques for low-power systems},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {1},
  pages        = {1--21},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(98)00057-5},
  doi          = {10.1016/S1383-7621(98)00057-5},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/HavingaS00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/HongK00,
  author       = {Won{-}Kee Hong and
                  Shin{-}Dug Kim},
  title        = {A section cache system designed for {VLIW} architectures},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {14},
  pages        = {1293--1308},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00025-4},
  doi          = {10.1016/S1383-7621(00)00025-4},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/HongK00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/Hsiung00,
  author       = {Pao{-}Ann Hsiung},
  title        = {Embedded software verification in hardware-software codesign},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {15},
  pages        = {1435--1450},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00034-5},
  doi          = {10.1016/S1383-7621(00)00034-5},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/Hsiung00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/JeonKCP00,
  author       = {JaeHo Jeon and
                  Hyung{-}Sun Kim and
                  GeonYoung Choi and
                  HyunWook Park},
  title        = {{KAIST} image computing system {(KICS):} {A} parallel architecture
                  for real-time multimedia data processing},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {15},
  pages        = {1403--1418},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00032-1},
  doi          = {10.1016/S1383-7621(00)00032-1},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/JeonKCP00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/JinH00,
  author       = {Hai Jin and
                  Kai Hwang},
  title        = {Stripped mirroring {RAID} architecture},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {6},
  pages        = {543--550},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00027-2},
  doi          = {10.1016/S1383-7621(99)00027-2},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/JinH00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/JungHL00,
  author       = {Inbum Jung and
                  Jongwoong Hyun and
                  Joonwon Lee},
  title        = {A scheduling policy for preserving cache locality in a multiprogrammed
                  system},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {13},
  pages        = {1191--1204},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00020-5},
  doi          = {10.1016/S1383-7621(00)00020-5},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/JungHL00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/JungM00,
  author       = {Inhwan Jung and
                  Sonchung Moon},
  title        = {Transaction multicasting scheme for resilient routing control in parallel
                  cluster database systems},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {8},
  pages        = {699--719},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00038-7},
  doi          = {10.1016/S1383-7621(99)00038-7},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/JungM00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/KangM00,
  author       = {Sukhoon Kang and
                  Songchun Moon},
  title        = {Read-down conflict-preserving serializability as a correctness criterion
                  for multilevel-secure optimistic concurrency control: {CSR/RD}},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {10},
  pages        = {889--902},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00045-4},
  doi          = {10.1016/S1383-7621(99)00045-4},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/KangM00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/Kaxiras00,
  author       = {Stefanos Kaxiras},
  title        = {Distributed vector architectures},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {11},
  pages        = {973--990},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00003-5},
  doi          = {10.1016/S1383-7621(00)00003-5},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/Kaxiras00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/KergommeauxF00,
  author       = {Jacques Chassin de Kergommeaux and
                  Alain Fagot},
  title        = {Execution replay of parallel procedural programs},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {10},
  pages        = {835--849},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00042-9},
  doi          = {10.1016/S1383-7621(99)00042-9},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/KergommeauxF00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/Khalid00,
  author       = {Humayun Khalid},
  title        = {Validation of SPEC6\({}^{\mbox{TM}}\) {CFP95} traces for accurate
                  performance evaluation of computer systems},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {7},
  pages        = {619--623},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00046-6},
  doi          = {10.1016/S1383-7621(99)00046-6},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/Khalid00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/Khalid00a,
  author       = {Humayun Khalid},
  title        = {Performance evaluation of system architectures with validated input
                  data},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {11},
  pages        = {1013--1017},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00006-0},
  doi          = {10.1016/S1383-7621(00)00006-0},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/Khalid00a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/Khanna00,
  author       = {Vimal K. Khanna},
  title        = {A novel approach for implementing high-speed and long-distance networking
                  protocols in a limited memory embedded kernel},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {14},
  pages        = {1335--1348},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00028-X},
  doi          = {10.1016/S1383-7621(00)00028-X},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/Khanna00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/KiK00,
  author       = {Ando Ki and
                  Alan E. Knowles},
  title        = {Stride prefetching for the secondary data cache},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {12},
  pages        = {1093--1102},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00011-4},
  doi          = {10.1016/S1383-7621(00)00011-4},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/KiK00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/KimC00,
  author       = {Jeong{-}Ki Kim and
                  Jae{-}Woo Chang},
  title        = {Vertically-partitioned parallel signature file method},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {8},
  pages        = {655--673},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00035-1},
  doi          = {10.1016/S1383-7621(99)00035-1},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/KimC00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/KimHK00,
  author       = {Young{-}Sik Kim and
                  Tack{-}Don Han and
                  Shin{-}Dug Kim},
  title        = {Impact of the memory interface structure in the memory-processor integrated
                  architecture for computer vision},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {3},
  pages        = {259--274},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00005-3},
  doi          = {10.1016/S1383-7621(99)00005-3},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/KimHK00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/KolinummiHS00,
  author       = {Pasi Kolinummi and
                  Timo H{\"{a}}m{\"{a}}l{\"{a}}inen and
                  Jukka Saarinen},
  title        = {Chained backplane communication architecture for scalable multiprocessor
                  systems},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {11},
  pages        = {955--972},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00002-3},
  doi          = {10.1016/S1383-7621(00)00002-3},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/KolinummiHS00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/KwonJC00,
  author       = {S. K. Kwon and
                  Hyoung{-}Goo Jeon and
                  Kyoung{-}Rok Cho},
  title        = {Optimum reserved resource allocation scheme for handoff in {CDMA}
                  cellular system},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {2},
  pages        = {131--144},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(98)00075-7},
  doi          = {10.1016/S1383-7621(98)00075-7},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/KwonJC00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/LamN00,
  author       = {Kam{-}yiu Lam and
                  Joseph Kee{-}Yin Ng},
  title        = {A conditional abortable priority ceiling protocol for scheduling mixed
                  real-time tasks},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {7},
  pages        = {573--585},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00020-X},
  doi          = {10.1016/S1383-7621(99)00020-X},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/LamN00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/LeeHK00,
  author       = {Jang{-}Soo Lee and
                  Won{-}Kee Hong and
                  Shin{-}Dug Kim},
  title        = {An on-chip cache compression technique to reduce decompression overhead
                  and design complexity},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {15},
  pages        = {1365--1382},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00030-8},
  doi          = {10.1016/S1383-7621(00)00030-8},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/LeeHK00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/LeeLK00,
  author       = {Jung{-}Hoon Lee and
                  Jang{-}Soo Lee and
                  Shin{-}Dug Kim},
  title        = {A new cache architecture based on temporal and spatial locality},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {15},
  pages        = {1451--1467},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00035-7},
  doi          = {10.1016/S1383-7621(00)00035-7},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/LeeLK00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/LeeYL00,
  author       = {Nam{-}Kyu Lee and
                  Sung{-}Bong Yang and
                  Kyoung{-}Woo Lee},
  title        = {Efficient parity placement schemes for tolerating up to two disk failures
                  in disk arrays},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {15},
  pages        = {1383--1402},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00031-X},
  doi          = {10.1016/S1383-7621(00)00031-X},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/LeeYL00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/LipariB00,
  author       = {Giuseppe Lipari and
                  Giorgio C. Buttazzo},
  title        = {Schedulability analysis of periodic and aperiodic tasks with resource
                  constraints},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {4},
  pages        = {327--338},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00009-0},
  doi          = {10.1016/S1383-7621(99)00009-0},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/LipariB00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/LohW00,
  author       = {K. S. Loh and
                  Weng{-}Fai Wong},
  title        = {Multiple context multithreaded superscalar processor architecture},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {3},
  pages        = {243--258},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00004-1},
  doi          = {10.1016/S1383-7621(99)00004-1},
  timestamp    = {Wed, 02 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/LohW00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/LoucifO00,
  author       = {Samia Loucif and
                  Mohamed Ould{-}Khaoua},
  title        = {On the relative performance merits of hypercube and hypermesh networks},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {12},
  pages        = {1103--1114},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00012-6},
  doi          = {10.1016/S1383-7621(00)00012-6},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/LoucifO00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/MalumbresD00,
  author       = {Manuel P. Malumbres and
                  Jos{\'{e}} Duato},
  title        = {An efficient implementation of tree-based multicast routing for distributed
                  shared-memory multiprocessors},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {11},
  pages        = {1019--1032},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00007-2},
  doi          = {10.1016/S1383-7621(00)00007-2},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/MalumbresD00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/MarsanNCV00,
  author       = {Marco Ajmone Marsan and
                  Fabio Neri and
                  C. Scarpati Cioffari and
                  A. Vasco},
  title        = {{GSPN} models of bridged {LAN} configurations},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {2},
  pages        = {105--130},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(98)00064-2},
  doi          = {10.1016/S1383-7621(98)00064-2},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/MarsanNCV00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/MasselosMSG00,
  author       = {Kostas Masselos and
                  Panagiotis Merakos and
                  Thanos Stouraitis and
                  Constantinos E. Goutis},
  title        = {Low power architectures for digital signal processing},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {7},
  pages        = {551--571},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00018-1},
  doi          = {10.1016/S1383-7621(99)00018-1},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/MasselosMSG00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/MaulikBB00,
  author       = {Ujjwal Maulik and
                  Sanghamitra Bandyopadhyay and
                  Siddhartha Bhattacharyya},
  title        = {Fault tolerant permutation mapping in multistage interconnection network},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {3},
  pages        = {297--300},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(98)00078-2},
  doi          = {10.1016/S1383-7621(98)00078-2},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/MaulikBB00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/McElhoneB00,
  author       = {Charlie McElhone and
                  Alan Burns},
  title        = {Scheduling optional computations for adaptive real-time systems},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {1},
  pages        = {49--77},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(98)00058-7},
  doi          = {10.1016/S1383-7621(98)00058-7},
  timestamp    = {Thu, 17 Mar 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jsa/McElhoneB00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/MittalMM00,
  author       = {Anita Mittal and
                  G. Manimaran and
                  C. Siva Ram Murthy},
  title        = {Integrated dynamic scheduling of hard and QoS degradable real-time
                  tasks in multiprocessor systems},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {9},
  pages        = {793--807},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00039-9},
  doi          = {10.1016/S1383-7621(99)00039-9},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/MittalMM00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/MoharamEN00,
  author       = {H. Moharam and
                  M. A. Abd El{-}Baky and
                  S. M. M. Nassar},
  title        = {{YOMNA} - An efficient deadlock-free multicast wormhole algorithm
                  in 2-D mesh multicomputers},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {12},
  pages        = {1073--1091},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00010-2},
  doi          = {10.1016/S1383-7621(00)00010-2},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/MoharamEN00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/MolanoVR00,
  author       = {Anastasio Molano and
                  {\'{A}}ngel Vi{\~{n}}a and
                  Ragunathan Rajkumar},
  title        = {Operating system support for the management of hard real-time disk
                  traffic},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {4},
  pages        = {379--395},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00012-0},
  doi          = {10.1016/S1383-7621(99)00012-0},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/MolanoVR00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/NavetSS00,
  author       = {Nicolas Navet and
                  Ye{-}Qiong Song and
                  Fran{\c{c}}oise Simonot},
  title        = {Worst-case deadline failure probability in real-time applications
                  distributed over controller area network},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {7},
  pages        = {607--617},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00016-8},
  doi          = {10.1016/S1383-7621(99)00016-8},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/NavetSS00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/OehringSU00,
  author       = {Heiko Oehring and
                  Ulrich Sigmund and
                  Theo Ungerer},
  title        = {Performance of simultaneous multithreaded multimedia-enhanced processors
                  for {MPEG-2} video decompression},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {11},
  pages        = {1033--1046},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00008-4},
  doi          = {10.1016/S1383-7621(00)00008-4},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/OehringSU00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/OliveiraF00,
  author       = {R{\^{o}}mulo Silva de Oliveira and
                  Joni da Silva Fraga},
  title        = {Fixed priority scheduling of tasks with arbitrary precedence constraints
                  in distributed hard real-time systems},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {11},
  pages        = {991--1004},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00004-7},
  doi          = {10.1016/S1383-7621(00)00004-7},
  timestamp    = {Mon, 26 Oct 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jsa/OliveiraF00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/Ould-KhaouaM00,
  author       = {Mohamed Ould{-}Khaoua and
                  Lewis M. Mackenzie},
  title        = {On the design of hypermesh interconnection networks for multicomputers},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {9},
  pages        = {779--792},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00031-4},
  doi          = {10.1016/S1383-7621(99)00031-4},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/Ould-KhaouaM00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/ParameswaranPB00,
  author       = {Sri Parameswaran and
                  Matthew F. Parkinson and
                  Peter L. Bartlett},
  title        = {Profiling in the {ASP} codesign environment},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {14},
  pages        = {1263--1274},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00016-3},
  doi          = {10.1016/S1383-7621(00)00016-3},
  timestamp    = {Mon, 26 Oct 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jsa/ParameswaranPB00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/PeirHYO00,
  author       = {Jih{-}Kwon Peir and
                  Windsor W. Hsu and
                  Honesty C. Young and
                  Shauchi Ong},
  title        = {Improving cache performance with Full-Map Block Directory},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {5},
  pages        = {439--454},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00021-1},
  doi          = {10.1016/S1383-7621(99)00021-1},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/PeirHYO00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/Pountourakis00,
  author       = {Ioannis E. Pountourakis},
  title        = {Optimal bandwidth allocation and stability of high-speed networks
                  for {CSMA/CD} protocols},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {13},
  pages        = {1253--1256},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00023-0},
  doi          = {10.1016/S1383-7621(00)00023-0},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/Pountourakis00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/PuliafitoTV00,
  author       = {Antonio Puliafito and
                  Orazio Tomarchio and
                  Lorenzo Vita},
  title        = {{MAP:} Design and implementation of a mobile agents' platform},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {2},
  pages        = {145--162},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(98)00076-9},
  doi          = {10.1016/S1383-7621(98)00076-9},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/PuliafitoTV00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/RacherlaRD00,
  author       = {Gopal Racherla and
                  Sridhar Radhakrishnan and
                  L. S. DeBrunner},
  title        = {Parameterization of efficient dynamic reconfigurable trees},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {10},
  pages        = {951--954},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00047-8},
  doi          = {10.1016/S1383-7621(99)00047-8},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/RacherlaRD00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/RheeL00,
  author       = {Yunseok Rhee and
                  Joonwon Lee},
  title        = {Broadcast directory: {A} scalable cache coherent architecture for
                  mesh-connected multiprocessors},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {10},
  pages        = {903--918},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00048-X},
  doi          = {10.1016/S1383-7621(99)00048-X},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/RheeL00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/Romanovsky00,
  author       = {Alexander B. Romanovsky},
  title        = {Extending conventional languages by distributed/concurrent exception
                  resolution},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {1},
  pages        = {79--95},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(98)00060-5},
  doi          = {10.1016/S1383-7621(98)00060-5},
  timestamp    = {Mon, 05 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jsa/Romanovsky00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/SanchezG00,
  author       = {Jos{\'{e}} L. S{\'{a}}nchez and
                  Jos{\'{e}} M. Garc{\'{\i}}a},
  title        = {Dynamic reconfiguration of node location in wormhole networks},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {10},
  pages        = {873--888},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00044-2},
  doi          = {10.1016/S1383-7621(99)00044-2},
  timestamp    = {Mon, 03 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jsa/SanchezG00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/SantosSOZ00,
  author       = {Rodrigo M. Santos and
                  Jorge Santos and
                  Javier Orozco and
                  Marcelo Zamb{\'{o}}n},
  title        = {Real-time multimedia standards in {DQDB}},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {7},
  pages        = {601--605},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00019-3},
  doi          = {10.1016/S1383-7621(99)00019-3},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/SantosSOZ00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/Sato00,
  author       = {Toshinori Sato},
  title        = {Quantitative evaluation of pipelining and decoupling a dynamic instruction
                  scheduling mechanism},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {13},
  pages        = {1231--1252},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00022-9},
  doi          = {10.1016/S1383-7621(00)00022-9},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/Sato00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/SiegelA00,
  author       = {Howard Jay Siegel and
                  Shoukat Ali},
  title        = {Techniques for mapping tasks to machines in heterogeneous computing
                  systems},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {8},
  pages        = {627--639},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00033-8},
  doi          = {10.1016/S1383-7621(99)00033-8},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/SiegelA00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/SohnM00,
  author       = {Kyungcheol Sohn and
                  Songchun Moon},
  title        = {Achieving high degree of concurrency in multidatabase transaction
                  scheduling: {MTOS}},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {8},
  pages        = {687--698},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00037-5},
  doi          = {10.1016/S1383-7621(99)00037-5},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/SohnM00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/Son00,
  author       = {S. H. Son},
  title        = {Issues and approaches to supporting timeliness and security in real-time
                  database systems},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {4},
  pages        = {397--410},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00013-2},
  doi          = {10.1016/S1383-7621(99)00013-2},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/Son00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/SongKJY00,
  author       = {Hyojeong Song and
                  Boseob Kwon and
                  Ikhyeon Jang and
                  Hyunsoo Yoon},
  title        = {An output queueing analysis of multipath {ATM} switches},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {11},
  pages        = {1005--1012},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00005-9},
  doi          = {10.1016/S1383-7621(00)00005-9},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/SongKJY00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/StappertA00,
  author       = {Friedhelm Stappert and
                  Peter Altenbernd},
  title        = {Complete worst-case execution time analysis of straight-line hard
                  real-time programs},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {4},
  pages        = {339--355},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00010-7},
  doi          = {10.1016/S1383-7621(99)00010-7},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/StappertA00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/Steininger00,
  author       = {Andreas Steininger},
  title        = {Testing and built-in self-test - {A} survey},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {9},
  pages        = {721--747},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00041-7},
  doi          = {10.1016/S1383-7621(99)00041-7},
  timestamp    = {Sat, 05 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/Steininger00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/SuarezGG00,
  author       = {Francisco J. Su{\'{a}}rez and
                  Daniel F. Garc{\'{\i}}a and
                  Javier Garc{\'{\i}}a},
  title        = {Measurement based analysis of temporal behaviour as support for scheduling
                  problems in parallel and distributed real-time systems},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {10},
  pages        = {931--949},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00050-8},
  doi          = {10.1016/S1383-7621(99)00050-8},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/SuarezGG00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/Szirmay-KalosMFH00,
  author       = {L{\'{a}}szl{\'{o}} Szirmay{-}Kalos and
                  G{\'{a}}bor M{\'{a}}rton and
                  Tibor F{\'{o}}ris and
                  Tam{\'{a}}s Horv{\'{a}}th},
  title        = {Development of process visualization systems: An object-oriented approach},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {3},
  pages        = {275--296},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00002-8},
  doi          = {10.1016/S1383-7621(99)00002-8},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/Szirmay-KalosMFH00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/TsaoHD00,
  author       = {Shiao{-}Li Tsao and
                  Yueh{-}Min Huang and
                  Jen{-}Wen Ding},
  title        = {Performance analysis of video storage server under initial delay bounds},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {2},
  pages        = {163--179},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(98)00065-4},
  doi          = {10.1016/S1383-7621(98)00065-4},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/TsaoHD00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/TyrrellS00,
  author       = {Andy M. Tyrrell and
                  Stephen L. Smith},
  title        = {Heterogeneous distributed and parallel architectures: Hardware, software
                  and design tools},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {8},
  pages        = {625--626},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00032-6},
  doi          = {10.1016/S1383-7621(99)00032-6},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/TyrrellS00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/VeglisPP00,
  author       = {Andreas A. Veglis and
                  Andreas S. Pombortsis and
                  Efstathios Papaefstathiou},
  title        = {Performance evaluation of a bus-based multistage multiprocessor architecture},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {1},
  pages        = {39--47},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(98)00061-7},
  doi          = {10.1016/S1383-7621(98)00061-7},
  timestamp    = {Mon, 15 Jun 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/VeglisPP00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/VenkatesuluGH00,
  author       = {D. Venkatesulu and
                  Timothy A. Gonsalves and
                  R. K. Hariram},
  title        = {On the performance of distributed objects},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {5},
  pages        = {411--428},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00023-5},
  doi          = {10.1016/S1383-7621(99)00023-5},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/VenkatesuluGH00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/VidyaPBS00,
  author       = {D. Vidya and
                  Ranjani Parthasarathy and
                  T. C. Bina and
                  N. G. Swaroopa},
  title        = {Architecture for fractal image compression},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {14},
  pages        = {1275--1291},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00018-7},
  doi          = {10.1016/S1383-7621(00)00018-7},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/VidyaPBS00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/VlassovA00,
  author       = {Vladimir Vlassov and
                  Rassul Ayani},
  title        = {Analytical modeling of multithreaded architectures},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {13},
  pages        = {1205--1230},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00021-7},
  doi          = {10.1016/S1383-7621(00)00021-7},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/VlassovA00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/Wang00,
  author       = {Dajin Wang},
  title        = {The diagnosability of hypercubes with arbitrarily missing links},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {6},
  pages        = {519--527},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00015-6},
  doi          = {10.1016/S1383-7621(99)00015-6},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/Wang00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/WangHW00,
  author       = {Wen{-}Fong Wang and
                  Wen{-}Shyang Hwang and
                  Jun{-}Yao Wang},
  title        = {Design of a large-scale Gbit/s {MAN} using a cyclic reservation-based
                  {MAC} protocol},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {12},
  pages        = {1115--1135},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(00)00013-8},
  doi          = {10.1016/S1383-7621(00)00013-8},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/WangHW00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/YangP00,
  author       = {Laurence Tianruo Yang and
                  Zebo Peng},
  title        = {An improved register-transfer level functional partitioning approach
                  for testability},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {3},
  pages        = {209--223},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(98)00079-4},
  doi          = {10.1016/S1383-7621(98)00079-4},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/YangP00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/YooPM00,
  author       = {Dongho Yoo and
                  Inyoung Park and
                  Seung Ryoul Maeng},
  title        = {Multistage ring network: An interconnection network for large scale
                  shared memory multiprocessors},
  journal      = {J. Syst. Archit.},
  volume       = {46},
  number       = {9},
  pages        = {765--778},
  year         = {2000},
  url          = {https://doi.org/10.1016/S1383-7621(99)00030-2},
  doi          = {10.1016/S1383-7621(99)00030-2},
  timestamp    = {Tue, 19 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/YooPM00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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