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@inproceedings{DBLP:conf/dsd/AkbariJNJ04,
author = {Mohammad K. Akbari and
Ali Jahanian and
Mohsen Naderi and
Bahman Javadi},
title = {Area Efficient, Low Power and Robust Design for Add-Compare-Select
Units},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {611--614},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333334},
doi = {10.1109/DSD.2004.1333334},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/AkbariJNJ04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/AlliB04,
author = {Soyeb Alli and
Chris Bailey},
title = {Compiler-Directed Dynamic Memory Disambiguation for Loop Structures},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {130--134},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333268},
doi = {10.1109/DSD.2004.1333268},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/AlliB04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/AlliB04a,
author = {Soyeb Alli and
Chris Bailey},
title = {A Mechanism for Implementing Precise Exceptions in Pipelined Processors},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {598--602},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333331},
doi = {10.1109/DSD.2004.1333331},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/AlliB04a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/AntochiJVL04,
author = {Iosif Antochi and
Ben H. H. Juurlink and
Stamatis Vassiliadis and
Petri Liuha},
title = {Scene Management Models and Overlap Tests for Tile-Based Rendering},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {424--431},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333306},
doi = {10.1109/DSD.2004.1333306},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/AntochiJVL04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/AouadiH04,
author = {Imed Aouadi and
Omar Hammami},
title = {Analysis and Hardware Design of a Scalable Dual {JPEG-2000} Entropy
Coder},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {227--233},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333281},
doi = {10.1109/DSD.2004.1333281},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/AouadiH04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/AvedilloQ04,
author = {Maria J. Avedillo and
Jos{\'{e}} M. Quintana},
title = {A Threshold Logic Synthesis Tool for {RTD} Circuits},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {624--627},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333337},
doi = {10.1109/DSD.2004.1333337},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/AvedilloQ04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/BabuZRI04,
author = {Hafiz Md. Hasan Babu and
Moinul Islam Zaber and
Md. Mazder Rahman and
Md. Rafiqul Islam},
title = {Implementation of Multiple-Valued Flip-Flips Using Pass Transistor
Logic},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {603--606},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333332},
doi = {10.1109/DSD.2004.1333332},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/BabuZRI04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/Bailey04,
author = {Chris Bailey},
title = {A Proposed Mechanism for Super-Pipelined Instruction-Issue for {ILP}
Stack Machines},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {121--129},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333267},
doi = {10.1109/DSD.2004.1333267},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/Bailey04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/BindalBHSSTW04,
author = {Ahmet Bindal and
Silvio Brugada and
T. Ha and
Willie Sana and
Mandeep Singh and
Vinilkant Tejaswi and
David Wyland},
title = {A Simple Micro-Threaded Data-Driven Processor},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {70--77},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333260},
doi = {10.1109/DSD.2004.1333260},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/BindalBHSSTW04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/BlunnoNP04,
author = {Ivan Blunno and
Guy Alain Narboni and
Claudio Passerone},
title = {An Automated Methodology for Low Electro-Magnetic Emissions Digital
Circuits Design},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {540--547},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333323},
doi = {10.1109/DSD.2004.1333323},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/BlunnoNP04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/BodenKBR04,
author = {Maik Boden and
Manfred Koegst and
Jos{\'{e}} Luis Tiburcio Bad{\'{\i}}a and
Steffen R{\"{u}}lke},
title = {Cost-Efficient Implementation of Adaptive Finite State Machines},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {144--151},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333270},
doi = {10.1109/DSD.2004.1333270},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/BodenKBR04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/CaoO04,
author = {Cao Cao and
Bengt Oelmann},
title = {Mixed Synchronous/Asynchronous State Memory for Low Power {FSM} Design},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {363--370},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333298},
doi = {10.1109/DSD.2004.1333298},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/CaoO04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/CazorlaKSFRV04,
author = {Francisco J. Cazorla and
Peter M. W. Knijnenburg and
Rizos Sakellariou and
Enrique Fern{\'{a}}ndez and
Alex Ram{\'{\i}}rez and
Mateo Valero},
title = {Implicit vs. Explicit Resource Allocation in {SMT} Processors},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {44--51},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333257},
doi = {10.1109/DSD.2004.1333257},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/CazorlaKSFRV04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/ChavesS04,
author = {Ricardo Chaves and
Leonel Sousa},
title = {\{2\({}^{\mbox{n}}\)+1, s\({}^{\mbox{n+k}}\), s\({}^{\mbox{n}}\)-1\}:
{A} New {RNS} Moduli Set Extension},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {210--217},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333279},
doi = {10.1109/DSD.2004.1333279},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/ChavesS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/ChenC04,
author = {Chichyang Chen and
Kuo{-}Sheng Cheng},
title = {An Efficient Exponential Algorithm with Exponential Convergence Rate},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {548--555},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333324},
doi = {10.1109/DSD.2004.1333324},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/ChenC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/ChircaSGWMBV04,
author = {Kai Chirca and
Michael J. Schulte and
John Glossner and
Haoran Wang and
Suman Mamidi and
Pablo I. Balzola and
Stamatis Vassiliadis},
title = {A Static Low-Power, High-Performance 32-bit Carry Skip Adder},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {615--619},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333335},
doi = {10.1109/DSD.2004.1333335},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/ChircaSGWMBV04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/CiaoCF04,
author = {Pasquale Ciao and
Giulio Colavolpe and
Luca Fanucci},
title = {A Parallel {VLSI} Architecture for 1-Gb/s, 2048-b, Rate-1/2 Turbo
Gallager Code Decoder},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {174--181},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333274},
doi = {10.1109/DSD.2004.1333274},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/CiaoCF04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/Cohen04,
author = {Abey Abraham Cohen},
title = {Addressing architecture for Brain-like Massively Parallel Computers},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {594--597},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333330},
doi = {10.1109/DSD.2004.1333330},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/Cohen04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/CorreSJM04,
author = {Gwenol{\'{e}} Corre and
Eric Senn and
Nathalie Julien and
Eric Martin},
title = {Memory Aware {HLS} and the Implementation of Ageing Vectors},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {88--95},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333262},
doi = {10.1109/DSD.2004.1333262},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/CorreSJM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/DSouzaP04,
author = {Matthew D'Souza and
Adam Postula},
title = {Architecture of Wireless Sensor Node using Novel Ultra-Wideband Modulation
Scheme},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {579--586},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333328},
doi = {10.1109/DSD.2004.1333328},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/DSouzaP04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/DietterleRDK04,
author = {Daniel Dietterle and
Jerzy Ryman and
Kai F. Dombrowski and
Rolf Kraemer},
title = {Mapping of High-Level {SDL} Models to Efficient Implementations for
TinyOS},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {402--406},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333303},
doi = {10.1109/DSD.2004.1333303},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/DietterleRDK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/DobiasK04,
author = {Radek Dobias and
Hana Kub{\'{a}}tov{\'{a}}},
title = {{FPGA} Based Design of the Railway's Interlocking Equipments},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {467--473},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333312},
doi = {10.1109/DSD.2004.1333312},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/DobiasK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/DrozdADL04,
author = {Alexander V. Drozd and
R. Al{-}Azzeh and
J. V. Drozd and
M. V. Lobachev},
title = {The Logarithmic Checking Method for On-Line Testing of Computing Circuits
for Processing of the Approximated Data},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {416--423},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333305},
doi = {10.1109/DSD.2004.1333305},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/DrozdADL04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/EjniouiA04,
author = {Abdel Ejnioui and
Abdelhalim Alsharqawi},
title = {Pipeline-Level Control of Self-Resetting Pipelines},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {342--349},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333295},
doi = {10.1109/DSD.2004.1333295},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/EjniouiA04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/ElleouetJHCM04,
author = {David Ell{\'{e}}ouet and
Nathalie Julien and
Dominique Houzet and
Jean{-}Gabriel Cousin and
Eric Martin},
title = {Power Consumption Characterization and Modeling of Embedded Memories
in {XILINX} {VIRTEX} 400E {FPGA}},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {394--401},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333302},
doi = {10.1109/DSD.2004.1333302},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/ElleouetJHCM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/FanucciLP04,
author = {Luca Fanucci and
Riccardo Locatelli and
Esa Petri},
title = {{VLSI} Design of a Digital {RFI} Cancellation Scheme for {VDSL} Transceivers},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {182--189},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333275},
doi = {10.1109/DSD.2004.1333275},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/FanucciLP04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/FeySD04,
author = {G{\"{o}}rschwin Fey and
Junhao Shi and
Rolf Drechsler},
title = {{BDD} Circuit Optimization for Path Delay Fault Testability},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {168--172},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333273},
doi = {10.1109/DSD.2004.1333273},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/FeySD04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/FiserK04,
author = {Petr Fiser and
Hana Kub{\'{a}}tov{\'{a}}},
title = {Boolean Minimizer FC-Min: Coverage Finding Process},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {152--159},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333271},
doi = {10.1109/DSD.2004.1333271},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/FiserK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/GawkowskiS04,
author = {Piotr Gawkowski and
Janusz Sosnowski},
title = {Evaluation of Transient Fault Susceptibility in Microprocessor Systems},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {432--439},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333307},
doi = {10.1109/DSD.2004.1333307},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/GawkowskiS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/HahanovHH04,
author = {Vladimir Hahanov and
Irina V. Hahanova and
Stanley Hyduke},
title = {Topological {BDP} Fault Simulation Method},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {440--443},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333308},
doi = {10.1109/DSD.2004.1333308},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/HahanovHH04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/HandyGT04,
author = {Matthias Handy and
Frank Grassert and
Dirk Timmermann},
title = {{DCP:} {A} New Data Collection Protocol for Bluetooth-Based Sensor
Networks},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {566--573},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333326},
doi = {10.1109/DSD.2004.1333326},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/HandyGT04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/HuPK04,
author = {Qubo Hu and
Martin Palkovic and
Per Gunnar Kjeldsberg},
title = {Memory Requirement Optimization with Loop Fusion and Loop Shifting},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {272--278},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333287},
doi = {10.1109/DSD.2004.1333287},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/HuPK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/HuangM04,
author = {Ruimin Huang and
Yiannos Manoli},
title = {Phased Array and Adaptive Antenna Transceivers in Wireless Sensor
Networks},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {587--592},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333329},
doi = {10.1109/DSD.2004.1333329},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/HuangM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/HydeR04,
author = {Peter D. Hyde and
G. Russell},
title = {{ASSEC:} An Asynchronous Self-Checking RISC-based Processor},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {104--111},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333265},
doi = {10.1109/DSD.2004.1333265},
timestamp = {Sat, 23 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dsd/HydeR04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/IranpourK04,
author = {Ali R. Iranpour and
Krzysztof Kuchcinski},
title = {Evaluation of {SIMD} Architecture Enhancement in Embedded Processors
for {MPEG-4}},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {262--269},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333286},
doi = {10.1109/DSD.2004.1333286},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/IranpourK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/JablonskiG04,
author = {Miroslaw Jablonski and
Marek Gorgon},
title = {Handel-C implementation of Classical Component Labelling Algorithm},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {387--393},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333301},
doi = {10.1109/DSD.2004.1333301},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/JablonskiG04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/Jerraya04,
author = {Ahmed Amine Jerraya},
title = {Long Term Trends for Embedded System Design},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {20--26},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333254},
doi = {10.1109/DSD.2004.1333254},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/Jerraya04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/JianwenC04,
author = {Luo Jianwen and
Jong Ching Chuen},
title = {Partially Reconfigurable Matrix Multiplication for Area and Time Efficiency
on FPGAs},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {244--248},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333283},
doi = {10.1109/DSD.2004.1333283},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/JianwenC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/Jozwiak04,
author = {Lech J{\'{o}}zwiak},
title = {Life-Inspired Systems},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {36--43},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333256},
doi = {10.1109/DSD.2004.1333256},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/Jozwiak04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/JozwiakB04,
author = {Lech J{\'{o}}zwiak and
Szymon Bieganski},
title = {Information Trans-Coders in Information-Driven Circuit Synthesis},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {288--397},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333289},
doi = {10.1109/DSD.2004.1333289},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/JozwiakB04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/JozwiakGS04,
author = {Lech J{\'{o}}zwiak and
Dominik Gawlowski and
Aleksander Slusarczyk},
title = {An Effective Solution of Benchmarking Problem {FSM} Benchmark Generator
and Its Application to Analysis of State Assignment Methods},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {160--167},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333272},
doi = {10.1109/DSD.2004.1333272},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/JozwiakGS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/KangG04,
author = {Jung{-}Yup Kang and
Jean{-}Luc Gaudiot},
title = {A Fast and Well-Structured Multiplier},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {508--515},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333319},
doi = {10.1109/DSD.2004.1333319},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/KangG04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/KarlssonEP04,
author = {Daniel Karlsson and
Petru Eles and
Zebo Peng},
title = {A Formal Verification Methodology for IP-based Designs},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {372--379},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333299},
doi = {10.1109/DSD.2004.1333299},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/KarlssonEP04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/KavaldjievS04,
author = {Nikolay Kavaldjiev and
Gerard J. M. Smit},
title = {An Energy-Efficient Network-on-Chip for a Heterogeneous Tiled Reconfigurable
Systems-on-Chip},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {492--498},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333317},
doi = {10.1109/DSD.2004.1333317},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/KavaldjievS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/KhanAP04,
author = {Faisal M. Khan and
Mark G. Arnold and
William M. Pottenger},
title = {Finite Precision Analysis of Support Vector Machine Classification
in Logarithmic Number Systems},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {254--261},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333285},
doi = {10.1109/DSD.2004.1333285},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/KhanAP04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/KorbelJ04,
author = {Stanislav Korbel and
Vlastimil J{\'{a}}nes},
title = {Interesting Applications of Atmel {AVR} Microcontrollers},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {499--506},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333318},
doi = {10.1109/DSD.2004.1333318},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/KorbelJ04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/KrekuPKS04,
author = {Jari Kreku and
Jani Penttil{\"{a}} and
Janne Kangas and
Juha{-}Pekka Soininen},
title = {Workload Simulation Method for Evaluation of Application Feasibility
in a Mobile Multiprocessor Platform},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {532--539},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333322},
doi = {10.1109/DSD.2004.1333322},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/KrekuPKS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/KucukkabakA04,
author = {Umut K{\"{u}}{\c{c}}{\"{u}}kkabak and
Ahmet Akkas},
title = {Design and Implementation of Reciprocal Unit Using Table Look-up and
Newton-Raphson Iteration},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {249--253},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333284},
doi = {10.1109/DSD.2004.1333284},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/KucukkabakA04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/KumarS04,
author = {J. D. Kranthi Kumar and
Shri K. V. Srinivasan},
title = {A Novel {VLSI} Architecture to Implement Region Merging Algorithm
for Image Segmentation},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {620--623},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333336},
doi = {10.1109/DSD.2004.1333336},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/KumarS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/KuspriyantoK04,
author = {Kuspriyanto and
Yusrila Y. Kerlooza},
title = {Towards New Real-Time Processor: The Multioperand MSB-First Real-Time
Adder},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {524--529},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333321},
doi = {10.1109/DSD.2004.1333321},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/KuspriyantoK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/LanB04,
author = {Mars Lan and
Morteza Biglari{-}Abhari},
title = {An Energy-Efficient Adaptive Multiple-Issue Architecture},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {350--357},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333296},
doi = {10.1109/DSD.2004.1333296},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/LanB04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/LiGSM04,
author = {Jianhong Li and
Laxmi P. Gewali and
Henry Selvaraj and
Muthukumar Venkatesan},
title = {Hybrid Greedy/Face Routing for Ad-Hoc Sensor Network},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {574--578},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333327},
doi = {10.1109/DSD.2004.1333327},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/LiGSM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/MalkiS04,
author = {Suleyman Malki and
Lambert Spaanenburg},
title = {On the Packet-Switched Implementation of a Discrete-Time {CNN}},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {234--241},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333282},
doi = {10.1109/DSD.2004.1333282},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/MalkiS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/MarteilJSM04,
author = {Florian Marteil and
Nathalie Julien and
Eric Senn and
Eric Martin},
title = {A Complete Methodology for Memory Optimization in {DSP} Applications},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {98--103},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333264},
doi = {10.1109/DSD.2004.1333264},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/MarteilJSM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/McFigginsYV04,
author = {Jeffrey McFiggins and
Marie Yvanoff and
Jayanti Venkataraman},
title = {Generalized Analytical Model for the Design of Irregularly Shaped
Power Planes and Passives in Mixed Signal Applications},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {195--199},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333277},
doi = {10.1109/DSD.2004.1333277},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/McFigginsYV04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/MihicSM04,
author = {Kresimir Mihic and
Tajana Simunic and
Giovanni De Micheli},
title = {Reliability and Power Management of Integrated Systems},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {5--11},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333252},
doi = {10.1109/DSD.2004.1333252},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/MihicSM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/MishraD04,
author = {Prabhat Mishra and
Nikil D. Dutt},
title = {Functional Validation of Programmable Architectures},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {12--19},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333253},
doi = {10.1109/DSD.2004.1333253},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dsd/MishraD04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/MohamedPE04,
author = {Abdil Rashid Mohamed and
Zebo Peng and
Petru Eles},
title = {A Heuristic for Wiring-Aware Built-In Self-Test Synthesis},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {408--415},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333304},
doi = {10.1109/DSD.2004.1333304},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/MohamedPE04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/MourelleN04,
author = {Luiza de Macedo Mourelle and
Nadia Nedjah},
title = {Fast Reconfigurable Hardware for the M-ary Modular Exponentiation},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {516--523},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333320},
doi = {10.1109/DSD.2004.1333320},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/MourelleN04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/NatesanR04,
author = {Jayapreetha Natesan and
Damu Radhakrishnan},
title = {Shift Invert Coding {(SINV)} for Low Power {VLSI}},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {190--194},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333276},
doi = {10.1109/DSD.2004.1333276},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/NatesanR04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/Nebel04,
author = {Wolfgang Nebel},
title = {System-Level Power Optimization},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {27--34},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333255},
doi = {10.1109/DSD.2004.1333255},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/Nebel04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/NielsenSM04,
author = {Sune Fallgaard Nielsen and
Jens Spars{\o} and
Jan Madsen},
title = {Towards Behavioral Synthesis of Asynchronous Circuits - An Implementation
Template Targeting Syntax Directed Compilation},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {298--305},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333290},
doi = {10.1109/DSD.2004.1333290},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/NielsenSM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/NoonanF04,
author = {Liam Noonan and
Colin Flanagan},
title = {Modeling a Network Processor Using Object Oriented Techniques},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {484--490},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333314},
doi = {10.1109/DSD.2004.1333314},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/NoonanF04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/OsorioB04,
author = {Roberto R. Osorio and
Javier D. Bruguera},
title = {Arithmetic Coding Architecture for {H.264/AVC} {CABAC} Compression
System},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {62--69},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333259},
doi = {10.1109/DSD.2004.1333259},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/OsorioB04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/OuadjaoutH04,
author = {Salim Ouadjaout and
Dominique Houzet},
title = {Easy SoC Design with {VCI} SystemC Adapters},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {316--323},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333292},
doi = {10.1109/DSD.2004.1333292},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/OuadjaoutH04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/Paulin04,
author = {Pierre G. Paulin},
title = {Automatic Mapping of Parallel Applications onto Multi-Processor Platforms:
{A} Multimedia Application},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {2--4},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333251},
doi = {10.1109/DSD.2004.1333251},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/Paulin04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/PetrovskyS04,
author = {Alexander A. Petrovsky and
Sergei L. Shkredov},
title = {Multi-Pipeline Implementations of Real-Time Vector {DFT}},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {326--333},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333293},
doi = {10.1109/DSD.2004.1333293},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/PetrovskyS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/PrainP04,
author = {Robert Prain and
Andrew P. Paplinski},
title = {A Distributed Arithmetic Online Rotator for Signal Processing Applications},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {459--466},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333311},
doi = {10.1109/DSD.2004.1333311},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/PrainP04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/RawskiSM04,
author = {Mariusz Rawski and
Henry Selvaraj and
Pawel Morawiecki},
title = {Efficient Method of Input Variable Partitioning in Functional Decomposition
Based on Evolutionary Algorithms},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {136--143},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333269},
doi = {10.1109/DSD.2004.1333269},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/RawskiSM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/ReyesBMCK04,
author = {V{\'{\i}}ctor Reyes and
Tom{\'{a}}s Bautista and
Gustavo Marrero Callic{\'{o}} and
Pedro P. Carballo and
Wido Kruijtzer},
title = {{CASSE:} {A} System-Level Modeling and Design-Space Exploration Tool
for Multiprocessor Systems-on-Chip},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {476--483},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333313},
doi = {10.1109/DSD.2004.1333313},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/ReyesBMCK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/RoivainenR04,
author = {Jussi Roivainen and
Jukka Rautio},
title = {IP-Block Based Integration of Very High Performance {WLAN} Modem},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {200--207},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333278},
doi = {10.1109/DSD.2004.1333278},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/RoivainenR04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/Schlichtmann04,
author = {Ulf Schlichtmann},
title = {Design Methodology Innovations Address Manufacturing Technology Challenges:
Power and Performance},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {52--59},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333258},
doi = {10.1109/DSD.2004.1333258},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/Schlichtmann04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/SeverITAO04,
author = {Refik Sever and
A. Neslin Ismailoglu and
Yusuf {\c{C}}agatay Tekmen and
Murat Askar and
Burak Okcan},
title = {A High Speed {FPGA} Implementation of the Rijndael Algorithm},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {358--362},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333297},
doi = {10.1109/DSD.2004.1333297},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/SeverITAO04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/ShiB04,
author = {Huibin Shi and
Chris Bailey},
title = {Investigating Available Instruction Level Parallelism for Stack Based
Machine Architectures},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {112--120},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333266},
doi = {10.1109/DSD.2004.1333266},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/ShiB04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/ShojaeiG04,
author = {Hamid Shojaei and
Habib Ghayoumi},
title = {Techniques for Formal Verification of Digital Systems: {A} System
Approach},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {444--449},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333309},
doi = {10.1109/DSD.2004.1333309},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/ShojaeiG04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/SpezialiZ04,
author = {Filippo Speziali and
Julien Zory},
title = {Scalable and Area Efficient Concurrent Interleaver for High Throughput
Turbo-Decoders},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {334--341},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333294},
doi = {10.1109/DSD.2004.1333294},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/SpezialiZ04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/TemelMA04,
author = {Turgay Temel and
Avni Morg{\"{u}}l and
Nizamettin Aydin},
title = {A Novel Signed Higher-Radix Full-Adder Algorithm and Implementation
with Current-Mode Multi-Valued Logic Circuits},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {80--87},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333261},
doi = {10.1109/DSD.2004.1333261},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/TemelMA04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/Trancoso04,
author = {Pedro Trancoso},
title = {What to Adapt in a High-Performance Microprocessor},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {556--563},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333325},
doi = {10.1109/DSD.2004.1333325},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/Trancoso04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/VenkatesanR04,
author = {Muthukumar Venkatesan and
Daggu Venkateshwar Rao},
title = {Image Processing Algorithms on Reconfigurable Architecture using HandelC},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {218--226},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333280},
doi = {10.1109/DSD.2004.1333280},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/VenkatesanR04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/VergosE04,
author = {Haridimos T. Vergos and
Costas Efstathiou},
title = {Diminished-1 Modulo 2\({}^{\mbox{n}}\) + 1 Squarer Design},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {380--386},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333300},
doi = {10.1109/DSD.2004.1333300},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/VergosE04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/Viswanath04,
author = {Vinod Viswanath},
title = {Multi-log Processor - Towards Scalable Event-Driven Multiprocessors},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {279--286},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333288},
doi = {10.1109/DSD.2004.1333288},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/Viswanath04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/VitabileGSS04,
author = {Salvatore Vitabile and
Antonio Gentile and
Sabato Marco Siniscalchi and
Filippo Sorbello},
title = {Efficient Rapid Prototyping of Image and Video Processing Algorithms},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {452--458},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333310},
doi = {10.1109/DSD.2004.1333310},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/VitabileGSS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/VivekanandarajahSB04,
author = {Kugan Vivekanandarajah and
Thambipillai Srikanthan and
Saurav Bhattacharyya},
title = {Dynamic Filter Cache for Low Power Instruction Memory Hierarchy},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {607--610},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333333},
doi = {10.1109/DSD.2004.1333333},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/VivekanandarajahSB04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/WolinskiKG04,
author = {Christophe Wolinski and
Krzysztof Kuchcinski and
Maya B. Gokhale},
title = {A Constraints Programming Approach to Communication Scheduling on
SoPC Architectures},
booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
pages = {308--315},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DSD.2004.1333291},
doi = {10.1109/DSD.2004.1333291},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/WolinskiKG04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/dsd/2004,
title = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
Methods and Tools, 31 August - 3 September 2004, Rennes, France},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://ieeexplore.ieee.org/xpl/conhome/9267/proceeding},
isbn = {0-7695-2203-3},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dsd/2004.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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