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"A Wide-Range All-Digital Delay-Locked Loop for DDR1-DDR5 Applications."

Chih-Wei Tsai et al. (2021)

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DOI: 10.1109/TVLSI.2021.3098171

access: closed

type: Journal Article

metadata version: 2021-11-03

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  - https://dblp.org/rec/journals/tvlsi/TsaiCTC21
Chih-Wei Tsai, Yu-Ting Chiu, Yo-Hao Tu, Kuo-Hsing Cheng:
A Wide-Range All-Digital Delay-Locked Loop for DDR1-DDR5 Applications. IEEE Trans. Very Large Scale Integr. Syst. 29(10): 1720-1729 (2021)

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