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"Path-Balanced Logic Design to Realize Block Ciphers Resistant to Power and ..."

Partha De, Chittaranjan Mandal, Udaya Parampalli (2019)

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DOI: 10.1109/TVLSI.2019.2896377

access: closed

type: Journal Article

metadata version: 2023-08-28

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Partha De, Chittaranjan Mandal, Udaya Parampalli:
Path-Balanced Logic Design to Realize Block Ciphers Resistant to Power and Timing Attacks. IEEE Trans. Very Large Scale Integr. Syst. 27(5): 1080-1092 (2019)

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