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"A 32Gb/s Time-Based PAM-4 Transceiver for High-Speed DRAM Interfaces With ..."

Po-Wei Chiu, Chris H. Kim (2022)

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DOI: 10.1109/TCSI.2022.3143876

access: closed

type: Journal Article

metadata version: 2022-05-18

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Po-Wei Chiu, Chris H. Kim:
A 32Gb/s Time-Based PAM-4 Transceiver for High-Speed DRAM Interfaces With In-Situ Channel Loss and Bit-Error-Rate Monitors. IEEE Trans. Circuits Syst. I Regul. Pap. 69(5): 1943-1951 (2022)

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