"Low-Power Clock Tree Design for Pre-Bond Testing of 3-D Stacked ICs."

Xin Zhao et al. (2011)

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DOI: 10.1109/TCAD.2010.2098130

access: closed

type: Journal Article

metadata version: 2022-10-02

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Xin Zhao, Dean L. Lewis, Hsien-Hsin S. Lee, Sung Kyu Lim:
Low-Power Clock Tree Design for Pre-Bond Testing of 3-D Stacked ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(5): 732-745 (2011)

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