"Delay optimization of digital CMOS VLSI circuits by transistor reordering."

Bradley S. Carlson, Suh-Juch Lee (1995)

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DOI: 10.1109/43.466335

access: closed

type: Journal Article

metadata version: 2020-09-24

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Bradley S. Carlson, Suh-Juch Lee:
Delay optimization of digital CMOS VLSI circuits by transistor reordering. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(10): 1183-1192 (1995)

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