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ORCID"A 0.016 mm2 0.26- $\mu$ W/MHz 60-240-MHz Digital PLL With ..."
Junheng Zhu, Woo-Seok Choi, Pavan Kumar Hanumolu (2019)
- Junheng Zhu
, Woo-Seok Choi, Pavan Kumar Hanumolu:
A 0.016 mm2 0.26- $\mu$ W/MHz 60-240-MHz Digital PLL With Delay-Modulating Clock Buffer in 65 nm CMOS. IEEE J. Solid State Circuits 54(8): 2186-2194 (2019)
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