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"1.6 Gb/s/pin 4-PAM signaling and circuits for a multidrop bus."

Jared L. Zerbe et al. (2001)

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DOI: 10.1109/4.918912

access: closed

type: Journal Article

metadata version: 2022-10-02

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  - journals/jssc/ZerbeCWTLGD01
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  - https://dblp.org/rec/journals/jssc/ZerbeCWTLGD01
Jared L. Zerbe, Pak Shing Chau, Carl W. Werner, Timothy P. Thrush, H. J. Liaw, Bruno W. Garlepp, Kevin S. Donnelly:
1.6 Gb/s/pin 4-PAM signaling and circuits for a multidrop bus. IEEE J. Solid State Circuits 36(5): 752-760 (2001)

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