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"A 4 × 4 × 2 Homogeneous Scalable 3D Network-on-Chip Circuit ..."

Pascal Vivet et al. (2017)

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DOI: 10.1109/JSSC.2016.2611497

access: closed

type: Journal Article

metadata version: 2020-08-30

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  - journals/jssc/VivetTLSBBDLPDC17
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  - https://dblp.org/rec/journals/jssc/VivetTLSBBDLPDC17
Pascal Vivet, Yvain Thonnart, Romain Lemaire, Cristiano Santos, Edith Beigné, Christian Bernard, Florian Darve, Didier Lattard, Ivan Miro Panades, Denis Dutoit, Fabien Clermidy, Séverine Cheramy, Abbas Sheibanyrad, Frédéric Pétrot, Eric Flamand, Jean Michailos, Alexandre Arriordaz, Lee Wang, Juergen Schloeffel:
A 4 × 4 × 2 Homogeneous Scalable 3D Network-on-Chip Circuit With 326 MFlit/s 0.66 pJ/b Robust and Fault Tolerant Asynchronous 3D Links. IEEE J. Solid State Circuits 52(1): 33-49 (2017)

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