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"A precise on-chip voltage generator for a gigascale DRAM with a negative ..."

Hitoshi Tanaka et al. (1999)

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DOI: 10.1109/4.777106

access: closed

type: Journal Article

metadata version: 2022-07-05

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Hitoshi Tanaka, Masakazu Aoki, Takeshi Sakata, Shin'ichiro Kimura, Narumi Sakashita, Hideto Hidaka, Tadashi Tachibana, Katsutaka Kimura:
A precise on-chip voltage generator for a gigascale DRAM with a negative word-line scheme. IEEE J. Solid State Circuits 34(8): 1084-1090 (1999)

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