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"A redundant multivalued logic for a 10-Gb/s CMOS demultiplexer IC."

Akira Tanabe et al. (2003)

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DOI: 10.1109/JSSC.2002.806287

access: closed

type: Journal Article

metadata version: 2022-06-23

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Akira Tanabe, Yasushi Nakahara, Akio Furukawa, Tohru Mogami:
A redundant multivalued logic for a 10-Gb/s CMOS demultiplexer IC. IEEE J. Solid State Circuits 38(1): 107-113 (2003)

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