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"A 2.4 Gb/s receiver and a 1: 16 demultiplexer in one chip using a super ..."

Fumihiko Sato et al. (1996)

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DOI: 10.1109/4.540055

access: closed

type: Journal Article

metadata version: 2022-07-18

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  - journals/jssc/SatoTSHSTMT96
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  - https://dblp.org/rec/journals/jssc/SatoTSHSTMT96
Fumihiko Sato, Hiroshi Tezuka, Masaaki Soda, Takasuke Hashimoto, Tetsuyuki Suzaki, Tom Tatsumi, Takenori Morikawa, Tsutomu Tashiro:
A 2.4 Gb/s receiver and a 1: 16 demultiplexer in one chip using a super self-aligned selectively grown SiGe base (SSSB) bipolar transistor. IEEE J. Solid State Circuits 31(10): 1451-1457 (1996)

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