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"A Sub-μW Energy Harvester Architecture With Reduced Top/Bottom Plate ..."
Mohamed Megahed, Tejasvi Anand (2023)
- Mohamed Megahed, Tejasvi Anand:
A Sub-μW Energy Harvester Architecture With Reduced Top/Bottom Plate Switching Loss Achieving 80.66% Peak Efficiency in 180-nm CMOS. IEEE J. Solid State Circuits 58(5): 1386-1399 (2023)
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