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"A 1-Gb/s/pin 512-Mb DDRII SDRAM using a digital DLL and a ..."

Tatsuya Matano et al. (2003)

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DOI: 10.1109/JSSC.2003.810030

access: closed

type: Journal Article

metadata version: 2022-04-20

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Tatsuya Matano, Yasuhiro Takai, Tsugio Takahashi, Yuusuke Sakito, Isamu Fujii, Yoshihiro Takaishi, Hiroki Fujisawa, Shuichi Kubouchi, Seiji Narui, Koji Arai, Makoto Morino, Masayuki Nakamura, Shinichi Miyatake, Toshihiro Sekiguchi, Kuniaki Koyama:
A 1-Gb/s/pin 512-Mb DDRII SDRAM using a digital DLL and a slew-rate-controlled output buffer. IEEE J. Solid State Circuits 38(5): 762-768 (2003)

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