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"A 1.8-GHz instruction window buffer for an out-of-order microprocessor core."

Jens Leenstra et al. (2001)

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DOI: 10.1109/4.962282

access: closed

type: Journal Article

metadata version: 2022-04-04

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  - https://dblp.org/rec/journals/jssc/LeenstraPMSSW01
Jens Leenstra, Jürgen Pille, Antje Müller, Wolfram M. Sauer, Rolf Sautter, Dieter F. Wendel:
A 1.8-GHz instruction window buffer for an out-of-order microprocessor core. IEEE J. Solid State Circuits 36(11): 1628-1635 (2001)

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