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ORCID"A 2-1600-MHz CMOS clock recovery PLL with low-Vdd capability."
Patrik Larsson (1999)
- Patrik Larsson:
A 2-1600-MHz CMOS clock recovery PLL with low-Vdd capability. IEEE J. Solid State Circuits 34(12): 1951-1960 (1999)
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