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"A low-power multiplying DLL for low-jitter multigigahertz clock generation ..."

Ramin Farjad-Rad et al. (2002)

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DOI: 10.1109/JSSC.2002.804340

access: closed

type: Journal Article

metadata version: 2022-04-08

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Ramin Farjad-Rad, William J. Dally, Hiok-Tiaq Ng, Ramesh Senthinathan, Ming-Ju Edward Lee, Rohit Rathi, John Poulton:
A low-power multiplying DLL for low-jitter multigigahertz clock generation in highly integrated digital chips. IEEE J. Solid State Circuits 37(12): 1804-1812 (2002)

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