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"A 16-bit, 125 MS/s, 385 mW, 78.7 dB SNR CMOS Pipeline ADC."

Siddharth Devarajan et al. (2009)

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DOI: 10.1109/JSSC.2009.2032636

access: closed

type: Journal Article

metadata version: 2020-08-30

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  - https://dblp.org/rec/journals/jssc/DevarajanSKDKW09
Siddharth Devarajan, Larry Singer, Dan Kelly, Steven Decker, Abhishek Kamath, Paul Wilkins:
A 16-bit, 125 MS/s, 385 mW, 78.7 dB SNR CMOS Pipeline ADC. IEEE J. Solid State Circuits 44(12): 3305-3313 (2009)

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