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"A 2× load/store pipe for a low-power 1-GHz embedded processor."

Zongjian Chen et al. (2003)

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DOI: 10.1109/JSSC.2003.818296

access: closed

type: Journal Article

metadata version: 2022-04-20

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  - https://dblp.org/rec/journals/jssc/ChenMNPORRSSKY03
Zongjian Chen, Daniel Murray, Steve Nishimoto, Mark H. Pearce, Max Oyker, Daniel Rodriguez, Robert Rogenmoser, Dongwook (Drew) Suh, Erik Supnet, Vincent von Kaenel, George Yiu:
A 2× load/store pipe for a low-power 1-GHz embedded processor. IEEE J. Solid State Circuits 38(11): 1857-1865 (2003)

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