"Improved 32-bit Conditional Sum Adder for Low-Power High-Speed Applications."

Kuo-Hsing Cheng, Shun-Wen Cheng (2006)

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type: Journal Article

metadata version: 2021-07-16

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Kuo-Hsing Cheng, Shun-Wen Cheng:
Improved 32-bit Conditional Sum Adder for Low-Power High-Speed Applications. J. Inf. Sci. Eng. 22(4): 975-989 (2006)

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