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"Automatic Design and Yield Enhancement of Data Converters."

Nahid Mirzaie, Hossein Shamsi, Gyung-Su Byun (2017)

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DOI: 10.1142/S0218126617500189

access: closed

type: Journal Article

metadata version: 2020-08-25

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  dblp key:
  - journals/jcsc/MirzaieSB17
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  - https://dblp.org/rec/journals/jcsc/MirzaieSB17
Nahid Mirzaie, Hossein Shamsi, Gyung-Su Byun:
Automatic Design and Yield Enhancement of Data Converters. J. Circuits Syst. Comput. 26(1): 1750018:1-1750018:19 (2017)

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