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"A quantitative design methodology for high-speed interpolation/averaging ADCs."

He Tang et al. (2017)

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DOI: 10.1016/J.VLSI.2017.03.008

access: closed

type: Journal Article

metadata version: 2020-02-20

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He Tang, Yong Peng, Xiang Lu, Albert Z. Wang, Hai Wang:
A quantitative design methodology for high-speed interpolation/averaging ADCs. Integr. 58: 215-224 (2017)

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