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ORCID"Power-delay optimization of D-latch/MUX source coupled logic gates."
Massimo Alioto, Gaetano Palumbo (2005)
- Massimo Alioto, Gaetano Palumbo:
Power-delay optimization of D-latch/MUX source coupled logic gates. Int. J. Circuit Theory Appl. 33(1): 65-86 (2005)
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