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"The microarchitecture of a multi-threaded RISC-V compliant processing core ..."

Abdallah Cheikh et al. (2017)

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DOI: —

access: open

type: Informal or Other Publication

metadata version: 2018-08-13

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  - electronic edition @ arxiv.org (open access)
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  dblp key:
  - journals/corr/abs-1712-04902
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  persistent URL:
  - https://dblp.org/rec/journals/corr/abs-1712-04902
Abdallah Cheikh, Gianmarco Cerutti, Antonio Mastrandrea, Francesco Menichelli, Mauro Olivieri:
The microarchitecture of a multi-threaded RISC-V compliant processing core family for IoT end-nodes. CoRR abs/1712.04902 (2017)

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