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ORCID"Low Latency YOLOv3-Tiny Accelerator for Low-Cost FPGA Using General Matrix ..."
Trio Adiono et al. (2021)
- Trio Adiono
, Adiwena Putra, Nana Sutisna, Infall Syafalni, Rahmat Mulyawan:
Low Latency YOLOv3-Tiny Accelerator for Low-Cost FPGA Using General Matrix Multiplication Principle. IEEE Access 9: 141890-141913 (2021)
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