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"Power Modeling and Efficient FPGA Implementation of FHT for Signal Processing."

Abbes Amira, Shrutisagar Chandrasekaran (2007)

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DOI: 10.1109/TVLSI.2007.893606

access: closed

type: Journal Article

metadata version: 2020-03-11

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  - https://dblp.org/rec/journals/tvlsi/AmiraC07
Abbes Amira, Shrutisagar Chandrasekaran:
Power Modeling and Efficient FPGA Implementation of FHT for Signal Processing. IEEE Trans. Very Large Scale Integr. Syst. 15(3): 286-295 (2007)

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