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"Pulsed-Latch Aware Placement for Timing-Integrity Optimization."

Yi-Lin Chuang et al. (2011)

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DOI: 10.1109/TCAD.2011.2165717

access: closed

type: Journal Article

metadata version: 2020-09-24

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  - https://dblp.org/rec/journals/tcad/ChuangKSC11
Yi-Lin Chuang, Sangmin Kim, Youngsoo Shin, Yao-Wen Chang:
Pulsed-Latch Aware Placement for Timing-Integrity Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(12): 1856-1869 (2011)

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