"An analytical, transistor-level energy model for SRAM-based caches."

Nikolaos Bellas, Ibrahim N. Hajj, Constantine D. Polychronopoulos (1999)

Details and statistics

DOI: 10.1109/ISCAS.1999.780129

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

a service of  Schloss Dagstuhl - Leibniz Center for Informatics