Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"From model to FPGA: Software-hardware co-design for efficient neural ..."

Kaiyuan Guo et al. (2016)

> Home

Details and statistics

DOI: 10.1109/HOTCHIPS.2016.7936208

access: closed

type: Conference or Workshop Paper

metadata version: 2020-11-20

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/hotchips/GuoSQYHWY16
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/hotchips/GuoSQYHWY16
Kaiyuan Guo, Lingzhi Sui, Jiantao Qiu, Song Yao, Song Han, Yu Wang, Huazhong Yang:
From model to FPGA: Software-hardware co-design for efficient neural network acceleration. Hot Chips Symposium 2016: 1-27

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.