"A 1.1μs 1.56Gb/s/mm2 Cost-Efficient Large-List SCL Polar ..."

Dongyun Kam, Byeong Yong Kong, Youngjoo Lee (2022)

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DOI: 10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830317

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type: Conference or Workshop Paper

metadata version: 2023-06-26

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Dongyun Kam, Byeong Yong Kong, Youngjoo Lee:
A 1.1μs 1.56Gb/s/mm² Cost-Efficient Large-List SCL Polar Decoder Using Fully-Reusable LLR Buffers in 28nm CMOS Technology. VLSI Technology and Circuits 2022: 204-205

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