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"A 100kHz-Bandwidth 98.3dB-SNDR Noise-Shaping SAR ADC with Improved ..."

Kazunori Hasebe et al. (2022)

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DOI: 10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830166

access: closed

type: Conference or Workshop Paper

metadata version: 2022-08-04

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  dblp key:
  - conf/vlsit/HasebeEMIYTNWMK22
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  - https://dblp.org/rec/conf/vlsit/HasebeEMIYTNWMK22
Kazunori Hasebe, Shinichirou Etou, Daisuke Miyazaki, Taiki Iguchi, Yuki Yagishita, Mika Takasaki, Takeru Nogamida, Hiroyuki Watanabe, Tomohiro Matsumoto, Yasushi Katayama:
A 100kHz-Bandwidth 98.3dB-SNDR Noise-Shaping SAR ADC with Improved Mismatch Error Shaping and Speed-Up Techniques. VLSI Technology and Circuits 2022: 56-57

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